From 168e97ebe8c904dad0704b27e6b4c3b6ae9ebf80 Mon Sep 17 00:00:00 2001
From: forbelief <1023299899@qq.com>
Date: Fri, 22 Apr 2016 14:10:43 +0800
Subject: [PATCH] =?UTF-8?q?=E5=AE=8C=E6=88=90flash=E7=9A=84=E6=93=A6?=
=?UTF-8?q?=E9=99=A4=E4=BB=A5=E5=8F=8A=E5=86=99=E5=85=A5=E7=9A=84=E9=AA=8C?=
=?UTF-8?q?=E8=AF=81?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
---
plan_manage_main/ewp/plan_manage_main.dep | 1965 ++++++++++++-----
plan_manage_main/ewp/plan_manage_main.ewp | 127 +-
plan_manage_main/ewp/plan_manage_main.ewt | 118 +-
.../ewp/settings/plan_manage_main.dbgdt | 28 +-
.../ewp/settings/plan_manage_main.dni | 5 +-
plan_manage_main/src/app/NormalDemo_Flash.c | 533 +++++
plan_manage_main/src/app/flash.c | 160 ++
plan_manage_main/src/app/include/config.h | 24 +-
plan_manage_main/src/app/include/flash.h | 85 +
.../src/app/include/plan_handle.h | 13 +
plan_manage_main/src/app/include/pm_time.h | 37 +
plan_manage_main/src/app/include/tft.h | 3 +
plan_manage_main/src/app/include/time.h | 28 -
plan_manage_main/src/app/main.c | 75 +-
plan_manage_main/src/app/plan_handle.c | 154 ++
plan_manage_main/src/app/pm_init.c | 4 +-
plan_manage_main/src/app/pm_time.c | 322 +++
plan_manage_main/src/app/tft.c | 114 +-
plan_manage_main/src/app/time.c | 178 --
.../FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h | 197 ++
...TFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h | 116 +
.../src/drivers/FTFx/include/SSD_FTFx.h | 945 ++++++++
.../drivers/FTFx/include/SSD_FTFx_Common.h | 424 ++++
.../drivers/FTFx/include/SSD_FTFx_Internal.h | 206 ++
.../src/drivers/FTFx/include/SSD_Types.h | 276 +++
.../src/drivers/FTFx/source/CopyToRam.c | 78 +
.../drivers/FTFx/source/DEFlashPartition.c | 102 +
.../drivers/FTFx/source/DFlashGetProtection.c | 93 +
.../drivers/FTFx/source/DFlashSetProtection.c | 104 +
.../src/drivers/FTFx/source/EEEWrite.c | 177 ++
.../drivers/FTFx/source/EERAMGetProtection.c | 93 +
.../drivers/FTFx/source/EERAMSetProtection.c | 105 +
.../src/drivers/FTFx/source/FlashCheckSum.c | 130 ++
.../FTFx/source/FlashCommandSequence.c | 91 +
.../drivers/FTFx/source/FlashEraseAllBlock.c | 96 +
.../src/drivers/FTFx/source/FlashEraseBlock.c | 130 ++
.../drivers/FTFx/source/FlashEraseResume.c | 100 +
.../drivers/FTFx/source/FlashEraseSector.c | 148 ++
.../drivers/FTFx/source/FlashEraseSuspend.c | 95 +
.../FTFx/source/FlashGetSecurityState.c | 107 +
.../src/drivers/FTFx/source/FlashInit.c | 172 ++
.../src/drivers/FTFx/source/FlashProgram.c | 150 ++
.../drivers/FTFx/source/FlashProgramCheck.c | 174 ++
.../drivers/FTFx/source/FlashProgramOnce.c | 109 +
.../drivers/FTFx/source/FlashProgramSection.c | 148 ++
.../src/drivers/FTFx/source/FlashReadOnce.c | 106 +
.../drivers/FTFx/source/FlashReadResource.c | 138 ++
.../drivers/FTFx/source/FlashSecurityBypass.c | 100 +
.../drivers/FTFx/source/FlashVerifyAllBlock.c | 98 +
.../drivers/FTFx/source/FlashVerifyBlock.c | 134 ++
.../drivers/FTFx/source/FlashVerifySection.c | 134 ++
.../drivers/FTFx/source/PFlashGetProtection.c | 91 +
.../drivers/FTFx/source/PFlashSetProtection.c | 108 +
.../src/drivers/FTFx/source/PFlashSwap.c | 163 ++
.../src/drivers/FTFx/source/PFlashSwapCtl.c | 128 ++
.../src/drivers/FTFx/source/SetEEEEnable.c | 100 +
.../FTFx/FTFx_CX_(128_64_32)K_32K_2K_1K_1K.h | 203 ++
.../drivers/FTFx/FTFx_CX_256K_32K_2K_1K_1K.h | 205 ++
.../FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K.h | 199 ++
.../FTFx/FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K.h | 111 +
.../FTFx/FTFx_KX_(128_64_32)K_0K_2K_1K_0K.h | 114 +
.../FTFx/FTFx_KX_(128_64_32)K_32K_2K_1K_1K.h | 197 ++
.../FTFx/FTFx_KX_(256_128)K_64K_4K_2K_2K.h | 193 ++
.../FTFx/FTFx_KX_(256_128_64)K_0K_0K_4K_0K.h | 100 +
.../FTFx/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h | 197 ++
...TFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h | 116 +
.../FTFx/FTFx_KX_(512_256)K_0K_4K_2K_0K.h | 122 +
.../FTFx_KX_(512_256_128_64)K_0K_0K_2K_0K.h | 111 +
.../FTFx/FTFx_KX_1024K_256K_4K_4K_4K.h | 203 ++
.../drivers/FTFx/FTFx_KX_128K_128K_4K_2K_2K.h | 191 ++
.../drivers/FTFx/FTFx_KX_256K_256K_4K_2K_2K.h | 197 ++
.../drivers/FTFx/FTFx_KX_512K_128K_4K_4K_4K.h | 203 ++
.../FTFx/FTFx_KX_512K_512K_16K_4K_4K.h | 205 ++
.../src/include/drivers/FTFx/SSD_FTFx.h | 945 ++++++++
.../include/drivers/FTFx/SSD_FTFx_Common.h | 424 ++++
.../include/drivers/FTFx/SSD_FTFx_Internal.h | 206 ++
.../src/include/drivers/FTFx/SSD_Types.h | 276 +++
.../src/include/drivers/FTFx/demo_cfg.h | 84 +
.../src/include/drivers/FTFx/user_cfg.h | 12 +
settings/plan_manage.wsdt | 32 +-
settings/plan_manage.wspos | 2 +-
81 files changed, 13873 insertions(+), 814 deletions(-)
create mode 100644 plan_manage_main/src/app/NormalDemo_Flash.c
create mode 100644 plan_manage_main/src/app/include/pm_time.h
delete mode 100644 plan_manage_main/src/app/include/time.h
create mode 100644 plan_manage_main/src/app/pm_time.c
delete mode 100644 plan_manage_main/src/app/time.c
create mode 100644 plan_manage_main/src/drivers/FTFx/include/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h
create mode 100644 plan_manage_main/src/drivers/FTFx/include/FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h
create mode 100644 plan_manage_main/src/drivers/FTFx/include/SSD_FTFx.h
create mode 100644 plan_manage_main/src/drivers/FTFx/include/SSD_FTFx_Common.h
create mode 100644 plan_manage_main/src/drivers/FTFx/include/SSD_FTFx_Internal.h
create mode 100644 plan_manage_main/src/drivers/FTFx/include/SSD_Types.h
create mode 100644 plan_manage_main/src/drivers/FTFx/source/CopyToRam.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/DEFlashPartition.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/DFlashGetProtection.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/DFlashSetProtection.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/EEEWrite.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/EERAMGetProtection.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/EERAMSetProtection.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashCheckSum.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashCommandSequence.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashEraseAllBlock.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashEraseBlock.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashEraseResume.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashEraseSector.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashEraseSuspend.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashGetSecurityState.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashInit.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashProgram.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashProgramCheck.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashProgramOnce.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashProgramSection.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashReadOnce.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashReadResource.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashSecurityBypass.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashVerifyAllBlock.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashVerifyBlock.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/FlashVerifySection.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/PFlashGetProtection.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/PFlashSetProtection.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/PFlashSwap.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/PFlashSwapCtl.c
create mode 100644 plan_manage_main/src/drivers/FTFx/source/SetEEEEnable.c
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_CX_(128_64_32)K_32K_2K_1K_1K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_CX_256K_32K_2K_1K_1K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(128_64_32)K_0K_2K_1K_0K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(128_64_32)K_32K_2K_1K_1K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128)K_64K_4K_2K_2K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64)K_0K_0K_4K_0K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(512_256)K_0K_4K_2K_0K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(512_256_128_64)K_0K_0K_2K_0K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_1024K_256K_4K_4K_4K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_128K_128K_4K_2K_2K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_256K_256K_4K_2K_2K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_512K_128K_4K_4K_4K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/FTFx_KX_512K_512K_16K_4K_4K.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/SSD_FTFx.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/SSD_FTFx_Common.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/SSD_FTFx_Internal.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/SSD_Types.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/demo_cfg.h
create mode 100644 plan_manage_main/src/include/drivers/FTFx/user_cfg.h
diff --git a/plan_manage_main/ewp/plan_manage_main.dep b/plan_manage_main/ewp/plan_manage_main.dep
index 9a7d8f9..d46baf7 100644
--- a/plan_manage_main/ewp/plan_manage_main.dep
+++ b/plan_manage_main/ewp/plan_manage_main.dep
@@ -2,7 +2,7 @@
2
- 1290675525
+ 874752655
Debug
@@ -16,10 +16,10 @@
$PROJ_DIR$\..\src\app\include\knob.h
$PROJ_DIR$\..\src\app\include\output.h
$PROJ_DIR$\..\src\app\include\plan_handle.h
+ $PROJ_DIR$\..\src\app\include\pm_time.h
$PROJ_DIR$\..\src\app\include\setup.h
$PROJ_DIR$\..\src\app\include\simulat_timer.h
$PROJ_DIR$\..\src\app\include\tft.h
- $PROJ_DIR$\..\src\app\include\time.h
$PROJ_DIR$\..\src\app\debug.c
$PROJ_DIR$\..\src\app\display.c
$PROJ_DIR$\..\src\app\flash.c
@@ -28,85 +28,13 @@
$PROJ_DIR$\..\src\app\key.c
$PROJ_DIR$\..\src\app\knob.c
$PROJ_DIR$\..\src\app\main.c
+ $PROJ_DIR$\..\src\app\NormalDemo_Flash.c
$PROJ_DIR$\..\src\app\output.c
$PROJ_DIR$\..\src\app\plan_handle.c
- $PROJ_DIR$\..\Debug\Exe\plan_manage_main.out
- $PROJ_DIR$\..\Debug\Obj\tft.pbi
- $TOOLKIT_DIR$\inc\c\stdint.h
- $PROJ_DIR$\..\Debug\Obj\simulat_timer.pbi
- $PROJ_DIR$\..\Debug\Obj\plan_handle.pbi
- $TOOLKIT_DIR$\inc\c\yvals.h
- $TOOLKIT_DIR$\inc\c\ycheck.h
- $TOOLKIT_DIR$\inc\c\stdio.h
- $TOOLKIT_DIR$\inc\c\DLib_Defaults.h
- $TOOLKIT_DIR$\inc\c\DLib_Product.h
- $TOOLKIT_DIR$\inc\c\xencoding_limits.h
- $TOOLKIT_DIR$\inc\c\DLib_Threads.h
- $TOOLKIT_DIR$\inc\c\ysizet.h
- $TOOLKIT_DIR$\inc\c\ystdio.h
- $PROJ_DIR$\..\Debug\Obj\debug.pbi
- $PROJ_DIR$\..\Debug\Obj\display.pbi
- $PROJ_DIR$\..\Debug\Obj\startup.pbi
- $PROJ_DIR$\..\Debug\Obj\stdlib.pbi
- $PROJ_DIR$\..\Debug\Obj\queue.pbi
- $PROJ_DIR$\..\Debug\Obj\i2c.pbi
- $PROJ_DIR$\..\Debug\Obj\mcg.pbi
- $PROJ_DIR$\..\Debug\Obj\uif.pbi
- $PROJ_DIR$\..\Debug\Obj\pit.pbi
- $PROJ_DIR$\..\Debug\Obj\gpio.pbi
- $TOOLKIT_DIR$\inc\c\stdarg.h
- $PROJ_DIR$\..\Debug\Obj\lptmr.pbi
- $PROJ_DIR$\..\Debug\Obj\port.pbi
- $PROJ_DIR$\..\Debug\Obj\rtc.pbi
- $PROJ_DIR$\..\Debug\Obj\SPI.pbi
- $PROJ_DIR$\..\Debug\Obj\systick.pbi
- $PROJ_DIR$\..\Debug\Obj\tick_timer.pbi
- $PROJ_DIR$\..\Debug\Obj\tpm.pbi
- $PROJ_DIR$\..\Debug\Obj\tsi.pbi
- $PROJ_DIR$\..\Debug\Obj\knob.o
- $PROJ_DIR$\..\Debug\Obj\key.o
- $PROJ_DIR$\..\Debug\Obj\isr.o
- $PROJ_DIR$\..\Debug\Obj\input.o
- $PROJ_DIR$\..\Debug\Obj\tft.o
- $PROJ_DIR$\..\Debug\Obj\time.o
- $PROJ_DIR$\..\Debug\Obj\plan_handle.o
- $PROJ_DIR$\..\Debug\Obj\display.o
- $PROJ_DIR$\..\Debug\Obj\simulat_timer.o
- $PROJ_DIR$\..\Debug\Obj\output.o
- $PROJ_DIR$\..\Debug\Obj\debug.o
- $PROJ_DIR$\..\Debug\Obj\flash.o
- $PROJ_DIR$\..\Debug\Obj\uart.pbi
- $PROJ_DIR$\..\Debug\Obj\LandzoOLED.o
- $PROJ_DIR$\..\Debug\Obj\LandzoOLED.pbi
- $PROJ_DIR$\..\Debug\Obj\adc.o
- $PROJ_DIR$\..\Debug\Obj\dma.o
- $PROJ_DIR$\..\Debug\Obj\cmp.o
- $PROJ_DIR$\..\Debug\Obj\dac.o
- $PROJ_DIR$\..\Debug\Obj\gpio.o
- $PROJ_DIR$\..\Debug\Obj\i2c.o
- $PROJ_DIR$\..\Debug\Obj\lptmr.o
- $PROJ_DIR$\..\Debug\Obj\mcg.o
- $PROJ_DIR$\..\Debug\Obj\pit.o
- $PROJ_DIR$\..\Debug\Obj\port.o
- $PROJ_DIR$\..\Debug\Obj\rtc.o
- $PROJ_DIR$\..\src\common\stdlib.c
- $PROJ_DIR$\..\Debug\Obj\key.pbi
- $PROJ_DIR$\..\Debug\Obj\isr.pbi
- $PROJ_DIR$\..\Debug\Obj\input.pbi
- $PROJ_DIR$\..\Debug\Obj\flash.pbi
- $PROJ_DIR$\..\Debug\Obj\main.pbi
- $PROJ_DIR$\..\Debug\Obj\main.o
- $PROJ_DIR$\..\Debug\Obj\alloc.o
- $PROJ_DIR$\..\Debug\Obj\assert.o
- $PROJ_DIR$\..\Debug\Obj\io.o
- $PROJ_DIR$\..\Debug\Obj\common.o
- $PROJ_DIR$\..\Debug\Obj\memtest.o
- $PROJ_DIR$\..\Debug\Obj\printf.o
- $TOOLKIT_DIR$\inc\c\stdlib.h
$PROJ_DIR$\..\src\app\pm_init.c
+ $PROJ_DIR$\..\src\app\pm_time.c
$PROJ_DIR$\..\src\app\simulat_timer.c
$PROJ_DIR$\..\src\app\tft.c
- $PROJ_DIR$\..\src\app\time.c
$PROJ_DIR$\..\src\common\alloc.c
$PROJ_DIR$\..\src\common\assert.c
$PROJ_DIR$\..\src\common\common.c
@@ -121,8 +49,238 @@
$PROJ_DIR$\..\src\cpu\start.c
$PROJ_DIR$\..\src\cpu\sysinit.c
$PROJ_DIR$\..\src\cpu\vectors.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\CopyToRam.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\DEFlashPartition.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\EERAMGetProtection.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\DFlashGetProtection.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\DFlashSetProtection.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\EEEWrite.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashCommandSequence.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\EERAMSetProtection.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashCheckSum.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseResume.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseAllBlock.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseBlock.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashProgram.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseSector.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseSuspend.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashInit.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashGetSecurityState.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashProgramCheck.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashReadResource.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashProgramOnce.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashProgramSection.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashReadOnce.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\PFlashSwapCtl.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashSecurityBypass.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashVerifyAllBlock.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashVerifyBlock.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashVerifySection.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\PFlashGetProtection.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\PFlashSetProtection.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\PFlashSwap.c
+ $PROJ_DIR$\..\src\drivers\FTFx\source\SetEEEEnable.c
$PROJ_DIR$\..\src\drivers\adc.c
$PROJ_DIR$\..\src\drivers\cmp.c
+ $PROJ_DIR$\..\Debug\Obj\FlashProgram.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashProgramCheck.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashProgramOnce.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashProgramSection.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashReadOnce.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashReadResource.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashSecurityBypass.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashVerifyAllBlock.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashGetSecurityState.o
+ $PROJ_DIR$\..\Debug\Obj\FlashInit.o
+ $PROJ_DIR$\..\Debug\Obj\FlashProgram.o
+ $PROJ_DIR$\..\Debug\Obj\FlashProgramCheck.o
+ $PROJ_DIR$\..\Debug\Obj\FlashProgramOnce.o
+ $PROJ_DIR$\..\Debug\Obj\FlashProgramSection.o
+ $PROJ_DIR$\..\Debug\Obj\FlashReadOnce.o
+ $PROJ_DIR$\..\Debug\Obj\FlashReadResource.o
+ $PROJ_DIR$\..\Debug\Obj\FlashSecurityBypass.o
+ $PROJ_DIR$\..\Debug\Obj\FlashVerifyAllBlock.o
+ $PROJ_DIR$\..\Debug\Obj\FlashVerifyBlock.o
+ $PROJ_DIR$\..\Debug\Obj\FlashVerifySection.o
+ $PROJ_DIR$\..\Debug\Obj\PFlashGetProtection.o
+ $PROJ_DIR$\..\Debug\Obj\PFlashSetProtection.o
+ $PROJ_DIR$\..\Debug\Obj\FlashVerifySection.pbi
+ $PROJ_DIR$\..\Debug\Obj\PFlashGetProtection.pbi
+ $PROJ_DIR$\..\Debug\Obj\PFlashSetProtection.pbi
+ $PROJ_DIR$\..\Debug\Obj\PFlashSwap.pbi
+ $PROJ_DIR$\..\Debug\Obj\PFlashSwapCtl.pbi
+ $PROJ_DIR$\..\Debug\Obj\SetEEEEnable.pbi
+ $PROJ_DIR$\..\Debug\Obj\plan_handle.o
+ $PROJ_DIR$\..\Debug\Obj\tft.o
+ $PROJ_DIR$\..\Debug\Obj\time.o
+ $PROJ_DIR$\..\Debug\Obj\printf.pbi
+ $TOOLKIT_DIR$\inc\c\ycheck.h
+ $PROJ_DIR$\..\Debug\Obj\startup.o
+ $PROJ_DIR$\..\Debug\Obj\tft.pbi
+ $PROJ_DIR$\..\src\app\time.c
+ $PROJ_DIR$\..\Debug\Obj\output.pbi
+ $PROJ_DIR$\..\Debug\Obj\queue.o
+ $TOOLKIT_DIR$\inc\c\stdlib.h
+ $PROJ_DIR$\..\Debug\Obj\io.o
+ $PROJ_DIR$\..\Debug\Obj\stdlib.o
+ $PROJ_DIR$\..\Debug\Obj\alloc.pbi
+ $PROJ_DIR$\..\Debug\Obj\plan_manage_main.pbd
+ $PROJ_DIR$\..\Debug\Obj\printf.o
+ $PROJ_DIR$\..\Debug\Obj\knob.pbi
+ $PROJ_DIR$\..\Debug\Obj\memtest.o
+ $PROJ_DIR$\..\Debug\Obj\assert.pbi
+ $TOOLKIT_DIR$\inc\c\stdint.h
+ $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h
+ $PROJ_DIR$\..\Debug\Obj\common.o
+ $PROJ_DIR$\..\Debug\Obj\assert.o
+ $PROJ_DIR$\..\Debug\Exe\plan_manage_main.out
+ $PROJ_DIR$\..\Debug\Obj\time.pbi
+ $PROJ_DIR$\..\Debug\Obj\queue.pbi
+ $PROJ_DIR$\..\Debug\Obj\i2c.pbi
+ $PROJ_DIR$\..\Debug\Obj\mcg.pbi
+ $PROJ_DIR$\..\Debug\Obj\uif.pbi
+ $PROJ_DIR$\..\Debug\Obj\tpm.o
+ $PROJ_DIR$\..\Debug\Obj\tsi.o
+ $PROJ_DIR$\..\Debug\Obj\tick_timer.o
+ $PROJ_DIR$\..\Debug\Obj\dma.pbi
+ $PROJ_DIR$\..\Debug\Obj\start.o
+ $PROJ_DIR$\..\Debug\Obj\dac.pbi
+ $PROJ_DIR$\..\Debug\Obj\cmp.pbi
+ $PROJ_DIR$\..\Debug\Obj\arm_cm0.o
+ $PROJ_DIR$\..\Debug\Obj\adc.pbi
+ $PROJ_DIR$\..\Debug\Obj\uart.o
+ $PROJ_DIR$\..\Debug\Obj\vectors.o
+ $PROJ_DIR$\..\Debug\Obj\io.pbi
+ $PROJ_DIR$\..\Debug\Obj\uif.o
+ $PROJ_DIR$\..\Debug\Obj\memtest.pbi
+ $PROJ_DIR$\..\Debug\Obj\common.pbi
+ $TOOLKIT_DIR$\inc\c\string.h
+ $TOOLKIT_DIR$\inc\c\DLib_Product_string.h
+ $PROJ_DIR$\..\Debug\Obj\SPI.o
+ $PROJ_DIR$\..\Debug\Obj\systick.o
+ $PROJ_DIR$\..\Debug\Obj\time64.o
+ $PROJ_DIR$\..\Debug\Obj\getzone.pbi
+ $PROJ_DIR$\..\src\app\getzone.c
+ $PROJ_DIR$\..\src\app\time64.c
+ $PROJ_DIR$\..\Debug\List\plan_manage_main.map
+ $TOOLKIT_DIR$\inc\c\yfuns.h
+ $PROJ_DIR$\..\src\app\clock.c
+ $TOOLKIT_DIR$\inc\c\time.h
+ $PROJ_DIR$\..\Debug\Obj\dma.o
+ $PROJ_DIR$\..\Debug\Obj\flash.o
+ $PROJ_DIR$\..\Debug\Obj\uart.pbi
+ $PROJ_DIR$\..\Debug\Obj\dac.o
+ $PROJ_DIR$\..\Debug\Obj\cmp.o
+ $PROJ_DIR$\..\Debug\Obj\adc.o
+ $PROJ_DIR$\..\Debug\Obj\tsi.pbi
+ $PROJ_DIR$\..\Debug\Obj\knob.o
+ $PROJ_DIR$\..\Debug\Obj\key.o
+ $PROJ_DIR$\..\Debug\Obj\isr.o
+ $PROJ_DIR$\..\Debug\Obj\plan_handle.pbi
+ $PROJ_DIR$\..\Debug\Obj\simulat_timer.pbi
+ $TOOLKIT_DIR$\inc\c\xencoding_limits.h
+ $TOOLKIT_DIR$\inc\c\DLib_Threads.h
+ $TOOLKIT_DIR$\inc\c\ysizet.h
+ $TOOLKIT_DIR$\inc\c\ystdio.h
+ $PROJ_DIR$\..\Debug\Obj\debug.pbi
+ $PROJ_DIR$\..\Debug\Obj\display.pbi
+ $PROJ_DIR$\..\Debug\Obj\startup.pbi
+ $PROJ_DIR$\..\Debug\Obj\stdlib.pbi
+ $TOOLKIT_DIR$\lib\rt6M_tl.a
+ $PROJ_DIR$\..\Debug\Obj\pm_init.o
+ $PROJ_DIR$\..\Debug\Obj\pm_init.pbi
+ $PROJ_DIR$\..\src\app\include\pm_init.h
+ $PROJ_DIR$\..\Debug\Obj\pit.pbi
+ $PROJ_DIR$\..\Debug\Obj\gpio.pbi
+ $TOOLKIT_DIR$\inc\c\stdarg.h
+ $PROJ_DIR$\..\Debug\Obj\lptmr.pbi
+ $PROJ_DIR$\..\Debug\Obj\port.pbi
+ $PROJ_DIR$\..\Debug\Obj\rtc.pbi
+ $PROJ_DIR$\..\Debug\Obj\SPI.pbi
+ $PROJ_DIR$\..\Debug\Obj\systick.pbi
+ $PROJ_DIR$\..\Debug\Obj\tick_timer.pbi
+ $PROJ_DIR$\..\Debug\Obj\tpm.pbi
+ $PROJ_DIR$\..\src\include\drivers\FTFx\SSD_Types.h
+ $PROJ_DIR$\..\Debug\Obj\NormalDemo_Flash.pbi
+ $PROJ_DIR$\..\src\include\drivers\FTFx\SSD_FTFx_Internal.h
+ $PROJ_DIR$\..\src\include\drivers\FTFx\user_cfg.h
+ $PROJ_DIR$\..\src\include\drivers\FTFx\FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h
+ $PROJ_DIR$\..\src\include\drivers\FTFx\SSD_FTFx.h
+ $TOOLKIT_DIR$\inc\c\DLib_Defaults.h
+ $PROJ_DIR$\..\src\include\drivers\FTFx\SSD_FTFx_Common.h
+ $PROJ_DIR$\..\Debug\Obj\NormalDemo_Flash.o
+ $TOOLKIT_DIR$\inc\c\stdio.h
+ $TOOLKIT_DIR$\inc\c\yvals.h
+ $PROJ_DIR$\..\Debug\Obj\arm_cm0.pbi
+ $PROJ_DIR$\..\Debug\Obj\sysinit.pbi
+ $PROJ_DIR$\..\Debug\Obj\start.pbi
+ $PROJ_DIR$\..\Debug\Obj\crt0.o
+ $PROJ_DIR$\..\Debug\Obj\vectors.pbi
+ $PROJ_DIR$\..\Debug\Obj\sysinit.o
+ $TOOLKIT_DIR$\inc\c\DLib_Product.h
+ $TOOLKIT_DIR$\lib\m6M_tl.a
+ $PROJ_DIR$\..\config_files\128KB_Pflash.icf
+ $TOOLKIT_DIR$\lib\dl6M_tln.a
+ $TOOLKIT_DIR$\lib\shb_l.a
+ $PROJ_DIR$\..\Debug\Obj\LandzoOLED.pbi
+ $PROJ_DIR$\..\Debug\Obj\alloc.o
+ $PROJ_DIR$\..\Debug\Obj\lptmr.o
+ $PROJ_DIR$\..\Debug\Obj\pm_time.pbi
+ $PROJ_DIR$\..\Debug\Obj\LandzoOLED.o
+ $PROJ_DIR$\..\Debug\Obj\rtc.o
+ $PROJ_DIR$\..\Debug\Obj\pit.o
+ $PROJ_DIR$\..\Debug\Obj\main.pbi
+ $PROJ_DIR$\..\Debug\Obj\clock.pbi
+ $PROJ_DIR$\..\Debug\Obj\i2c.o
+ $PROJ_DIR$\..\Debug\Obj\port.o
+ $PROJ_DIR$\..\Debug\Obj\main.o
+ $PROJ_DIR$\..\Debug\Obj\getzone.o
+ $PROJ_DIR$\..\Debug\Obj\flash.pbi
+ $PROJ_DIR$\..\Debug\Obj\pm_time.o
+ $PROJ_DIR$\..\Debug\Obj\input.pbi
+ $PROJ_DIR$\..\src\common\stdlib.c
+ $PROJ_DIR$\..\Debug\Obj\key.pbi
+ $PROJ_DIR$\..\Debug\Obj\isr.pbi
+ $PROJ_DIR$\..\Debug\Obj\time64.pbi
+ $PROJ_DIR$\..\Debug\Obj\gpio.o
+ $PROJ_DIR$\..\Debug\Obj\mcg.o
+ $PROJ_DIR$\..\Debug\Obj\output.o
+ $PROJ_DIR$\..\Debug\Obj\clock.o
+ $PROJ_DIR$\..\src\include\drivers\FTFx\demo_cfg.h
+ $PROJ_DIR$\..\Debug\Obj\PFlashSwap.o
+ $PROJ_DIR$\..\Debug\Obj\PFlashSwapCtl.o
+ $PROJ_DIR$\..\Debug\Obj\SetEEEEnable.o
+ $PROJ_DIR$\..\Debug\Obj\CopyToRam.pbi
+ $PROJ_DIR$\..\Debug\Obj\DEFlashPartition.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseBlock.pbi
+ $PROJ_DIR$\..\Debug\Obj\DFlashGetProtection.pbi
+ $PROJ_DIR$\..\Debug\Obj\DFlashSetProtection.pbi
+ $PROJ_DIR$\..\Debug\Obj\EEEWrite.pbi
+ $PROJ_DIR$\..\Debug\Obj\EERAMGetProtection.pbi
+ $PROJ_DIR$\..\Debug\Obj\EERAMSetProtection.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashCheckSum.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashCommandSequence.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseAllBlock.pbi
+ $PROJ_DIR$\..\Debug\Obj\CopyToRam.o
+ $PROJ_DIR$\..\Debug\Obj\DFlashGetProtection.o
+ $PROJ_DIR$\..\Debug\Obj\DEFlashPartition.o
+ $PROJ_DIR$\..\Debug\Obj\DFlashSetProtection.o
+ $PROJ_DIR$\..\Debug\Obj\EEEWrite.o
+ $PROJ_DIR$\..\Debug\Obj\EERAMGetProtection.o
+ $PROJ_DIR$\..\Debug\Obj\EERAMSetProtection.o
+ $PROJ_DIR$\..\Debug\Obj\FlashCheckSum.o
+ $PROJ_DIR$\..\Debug\Obj\FlashCommandSequence.o
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseAllBlock.o
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseBlock.o
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseResume.o
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseSector.o
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseSuspend.o
+ $PROJ_DIR$\..\Debug\Obj\FlashVerifyBlock.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseSector.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseResume.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashEraseSuspend.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashGetSecurityState.pbi
+ $PROJ_DIR$\..\Debug\Obj\FlashInit.pbi
$PROJ_DIR$\..\src\drivers\dac.c
$PROJ_DIR$\..\src\drivers\dma.c
$PROJ_DIR$\..\src\drivers\gpio.c
@@ -148,6 +306,7 @@
$PROJ_DIR$\..\src\include\common\typedef.h
$PROJ_DIR$\..\src\include\common\uif.h
$PROJ_DIR$\..\src\include\cpu\arm_cm0.h
+ $PROJ_DIR$\..\src\include\cpu\dma_channels.h
$PROJ_DIR$\..\src\include\cpu\MKL25Z4.h
$PROJ_DIR$\..\src\include\cpu\sysinit.h
$PROJ_DIR$\..\src\include\cpu\vectors.h
@@ -178,57 +337,17 @@
$PROJ_DIR$\..\src\include\platforms\tower.h
$PROJ_DIR$\..\src\other\LandzoOLED.c
$PROJ_DIR$\..\src\other\LandzoOLED.h
- $PROJ_DIR$\..\Debug\Obj\startup.o
- $PROJ_DIR$\..\Debug\Obj\stdlib.o
- $PROJ_DIR$\..\Debug\Obj\queue.o
- $PROJ_DIR$\..\Debug\Obj\assert.pbi
- $PROJ_DIR$\..\Debug\Obj\alloc.pbi
- $PROJ_DIR$\..\Debug\Obj\printf.pbi
- $PROJ_DIR$\..\Debug\Obj\io.pbi
- $PROJ_DIR$\..\Debug\Obj\uif.o
- $PROJ_DIR$\..\Debug\Obj\memtest.pbi
- $PROJ_DIR$\..\Debug\Obj\common.pbi
- $TOOLKIT_DIR$\inc\c\string.h
- $TOOLKIT_DIR$\inc\c\DLib_Product_string.h
- $PROJ_DIR$\..\Debug\Obj\SPI.o
- $PROJ_DIR$\..\Debug\Obj\systick.o
- $PROJ_DIR$\..\Debug\Obj\tick_timer.o
- $PROJ_DIR$\..\Debug\Obj\tpm.o
- $PROJ_DIR$\..\Debug\Obj\tsi.o
- $PROJ_DIR$\..\Debug\Obj\uart.o
- $PROJ_DIR$\..\Debug\Obj\adc.pbi
- $PROJ_DIR$\..\Debug\Obj\cmp.pbi
- $PROJ_DIR$\..\Debug\Obj\dma.pbi
- $PROJ_DIR$\..\Debug\Obj\dac.pbi
- $PROJ_DIR$\..\Debug\Obj\start.o
- $PROJ_DIR$\..\Debug\Obj\arm_cm0.o
- $PROJ_DIR$\..\Debug\Obj\vectors.o
- $PROJ_DIR$\..\Debug\Obj\sysinit.o
- $PROJ_DIR$\..\Debug\Obj\crt0.o
- $PROJ_DIR$\..\Debug\Obj\arm_cm0.pbi
- $PROJ_DIR$\..\Debug\Obj\start.pbi
- $PROJ_DIR$\..\Debug\Obj\sysinit.pbi
- $PROJ_DIR$\..\Debug\Obj\vectors.pbi
- $TOOLKIT_DIR$\lib\m6M_tl.a
- $PROJ_DIR$\..\config_files\128KB_Pflash.icf
- $TOOLKIT_DIR$\lib\dl6M_tln.a
- $TOOLKIT_DIR$\lib\shb_l.a
- $TOOLKIT_DIR$\lib\rt6M_tl.a
- $PROJ_DIR$\..\Debug\Obj\pm_init.o
- $PROJ_DIR$\..\Debug\Obj\pm_init.pbi
- $PROJ_DIR$\..\src\app\include\pm_init.h
- $PROJ_DIR$\..\Debug\Obj\knob.pbi
- $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h
- $PROJ_DIR$\..\Debug\Obj\output.pbi
- $PROJ_DIR$\..\Debug\Obj\time.pbi
- $PROJ_DIR$\..\Debug\Obj\plan_manage_main.pbd
+ $PROJ_DIR$\..\Debug\Obj\input.o
+ $PROJ_DIR$\..\Debug\Obj\debug.o
+ $PROJ_DIR$\..\Debug\Obj\simulat_timer.o
+ $PROJ_DIR$\..\Debug\Obj\display.o
[ROOT_NODE]
ILINK
- 24
+ 127 156
@@ -236,22 +355,22 @@
$PROJ_DIR$\..\src\app\debug.c
- ICCARM
- 67
+ BICOMP
+ 176
- BICOMP
- 38
+ ICCARM
+ 332
- ICCARM
- 26 30 29 32 212 33 34 35 155 133 142 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 1 0
+ BICOMP
+ 123 108 204 200 124 211 172 173 314 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 1 0
- BICOMP
- 26 30 29 32 212 33 34 35 155 133 142 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 1 0
+ ICCARM
+ 123 108 204 200 124 211 172 173 314 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 1 0
@@ -259,12 +378,12 @@
$PROJ_DIR$\..\src\app\display.c
- ICCARM
- 64
+ BICOMP
+ 177
- BICOMP
- 39
+ ICCARM
+ 334
@@ -272,25 +391,35 @@
$PROJ_DIR$\..\src\app\flash.c
- ICCARM
- 68
+ BICOMP
+ 229
- BICOMP
- 87
+ ICCARM
+ 161
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198 3 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198 3 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
+
+
$PROJ_DIR$\..\src\app\input.c
- ICCARM
- 60
+ BICOMP
+ 231
- BICOMP
- 86
+ ICCARM
+ 331
@@ -298,18 +427,22 @@
$PROJ_DIR$\..\src\app\isr.c
- ICCARM
- 59
+ BICOMP
+ 234
- BICOMP
- 85
+ ICCARM
+ 169
+
+ BICOMP
+ 203 108 204 200 124 211 172 173 174 175 314 291 301 123 290 292 293 294 114 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 5 12 1 0 7
+
ICCARM
- 31 30 29 32 212 33 34 35 36 37 155 133 142 26 132 134 135 136 96 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 5 11 1 0 7
+ 203 108 204 200 124 211 172 173 174 175 314 291 301 123 290 292 293 294 114 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 5 12 1 0 7
@@ -317,22 +450,22 @@
$PROJ_DIR$\..\src\app\key.c
- ICCARM
- 58
+ BICOMP
+ 233
- BICOMP
- 84
+ ICCARM
+ 168
- ICCARM
- 26 30 29 32 212 33 34 35 155 133 142 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 6 0
+ BICOMP
+ 123 108 204 200 124 211 172 173 314 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 6 0
- BICOMP
- 26 30 29 32 212 33 34 35 155 133 142 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 6 0
+ ICCARM
+ 123 108 204 200 124 211 172 173 314 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 6 0
@@ -340,22 +473,22 @@
$PROJ_DIR$\..\src\app\knob.c
- ICCARM
- 57
+ BICOMP
+ 120
- BICOMP
- 211
+ ICCARM
+ 167
- ICCARM
- 26 30 29 32 212 33 34 35 155 133 142 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 7 0
+ BICOMP
+ 123 108 204 200 124 211 172 173 314 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 7 0
- BICOMP
- 26 30 29 32 212 33 34 35 155 133 142 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 7 0
+ ICCARM
+ 123 108 204 200 124 211 172 173 314 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 7 0
@@ -363,22 +496,45 @@
$PROJ_DIR$\..\src\app\main.c
- ICCARM
- 89
+ BICOMP
+ 223
- BICOMP
- 88
+ ICCARM
+ 227
- ICCARM
- 31 30 29 32 212 33 34 35 36 37 96 133 142 26 132 134 135 136 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 210 11 6 7 12 0 13
+ BICOMP
+ 203 108 204 200 124 211 172 173 174 175 114 291 301 123 290 292 293 294 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 183 12 6 7 13 0 10 9
+
+ ICCARM
+ 203 108 204 200 124 211 172 173 174 175 114 291 301 123 290 292 293 294 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 183 12 6 7 13 0 10 9
+
+
+
+
+ $PROJ_DIR$\..\src\app\NormalDemo_Flash.c
+
BICOMP
- 31 30 29 32 212 33 34 35 36 37 96 133 142 26 132 134 135 136 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 210 11 6 7 12 0 13
+ 195
+
+
+ ICCARM
+ 202
+
+
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198 240 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198 240 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -386,57 +542,35 @@
$PROJ_DIR$\..\src\app\output.c
- ICCARM
- 66
+ BICOMP
+ 112
- BICOMP
- 213
+ ICCARM
+ 238
$PROJ_DIR$\..\src\app\plan_handle.c
-
- ICCARM
- 63
-
BICOMP
- 28
+ 170
-
-
-
- $PROJ_DIR$\..\Debug\Exe\plan_manage_main.out
-
-
- ILINK
- 204 72 90 195 91 74 93 198 75 67 64 73 68 76 77 60 92 59 58 57 70 78 89 79 94 66 80 63 208 81 95 174 82 65 184 194 172 197 185 61 186 62 187 188 189 179 196 206 207 203 205
-
-
-
-
- $PROJ_DIR$\..\src\common\stdlib.c
-
ICCARM
- 173
-
-
- BICOMP
- 41
+ 104
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 138 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 123 108 204 200 124 211 172 173 311 314 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 326 312 313 304 315 318 324 307 9 10 13 0
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 138 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 123 108 204 200 124 211 172 173 311 314 291 301 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 326 312 313 304 315 318 324 307 9 10 13 0
@@ -444,22 +578,45 @@
$PROJ_DIR$\..\src\app\pm_init.c
- ICCARM
- 208
+ BICOMP
+ 182
- BICOMP
- 209
+ ICCARM
+ 181
- ICCARM
- 11 26 30 29 32 212 33 34 35 6 7 141 144 1 12 0 13
+ BICOMP
+ 12 123 108 204 200 124 211 172 173 6 7 299 303 1 13 0 10 9
+
+ ICCARM
+ 12 123 108 204 200 124 211 172 173 6 7 299 303 1 13 0 10 9
+
+
+
+
+ $PROJ_DIR$\..\src\app\pm_time.c
+
BICOMP
- 11 26 30 29 32 212 33 34 35 6 7 141 144 1 12 0 13
+ 219
+
+
+ ICCARM
+ 230
+
+
+
+
+ BICOMP
+ 311 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 326 312 313 304 315 318 324 307 10 0
+
+
+ ICCARM
+ 311 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 326 312 313 304 315 318 324 307 10 0
@@ -467,22 +624,22 @@
$PROJ_DIR$\..\src\app\simulat_timer.c
- ICCARM
- 65
+ BICOMP
+ 171
- BICOMP
- 27
+ ICCARM
+ 333
- ICCARM
- 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 11 0 6
+ BICOMP
+ 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 12 0 6
- BICOMP
- 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 11 0 6
+ ICCARM
+ 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 12 0 6
@@ -490,45 +647,22 @@
$PROJ_DIR$\..\src\app\tft.c
- ICCARM
- 61
+ BICOMP
+ 110
- BICOMP
- 25
+ ICCARM
+ 105
-
- ICCARM
- 26 30 29 32 212 33 34 35 182 36 183 31 37 167 133 142 132 134 135 136 96 140 139 168 157 150 141 144 137 143 151 160 155 152 153 154 145 156 159 165 148 149 12 7 6 0 13
-
BICOMP
- 26 30 29 32 212 33 34 35 182 36 183 31 37 167 133 142 132 134 135 136 96 140 139 168 157 150 141 144 137 143 151 160 155 152 153 154 145 156 159 165 148 149 12 7 6 0 13
+ 123 108 204 200 124 211 172 173 148 174 149 203 175 326 291 301 290 292 293 294 114 298 297 327 316 309 299 303 295 302 310 319 314 311 312 313 304 315 318 324 307 308 13 7 6 0 10 9
-
-
-
- $PROJ_DIR$\..\src\app\time.c
-
ICCARM
- 62
-
-
- BICOMP
- 214
-
-
-
-
- ICCARM
- 152 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 167 153 154 145 156 159 165 148 13 0
-
-
- BICOMP
- 152 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 167 153 154 145 156 159 165 148 13 0
+ 123 108 204 200 124 211 172 173 148 174 149 203 175 326 291 301 290 292 293 294 114 298 297 327 316 309 299 303 295 302 310 319 314 311 312 313 304 315 318 324 307 308 13 7 6 0 10 9
@@ -536,22 +670,22 @@
$PROJ_DIR$\..\src\common\alloc.c
- ICCARM
- 90
+ BICOMP
+ 117
- BICOMP
- 176
+ ICCARM
+ 217
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -559,22 +693,22 @@
$PROJ_DIR$\..\src\common\assert.c
- ICCARM
- 91
+ BICOMP
+ 122
- BICOMP
- 175
+ ICCARM
+ 126
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -582,22 +716,22 @@
$PROJ_DIR$\..\src\common\common.c
- ICCARM
- 93
+ BICOMP
+ 147
- BICOMP
- 181
+ ICCARM
+ 125
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -605,22 +739,22 @@
$PROJ_DIR$\..\src\common\io.c
- ICCARM
- 92
+ BICOMP
+ 144
- BICOMP
- 178
+ ICCARM
+ 115
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -628,22 +762,22 @@
$PROJ_DIR$\..\src\common\memtest.c
- ICCARM
- 94
+ BICOMP
+ 146
- BICOMP
- 180
+ ICCARM
+ 121
- ICCARM
- 135
+ BICOMP
+ 293
- BICOMP
- 135
+ ICCARM
+ 293
@@ -651,22 +785,22 @@
$PROJ_DIR$\..\src\common\printf.c
- ICCARM
- 95
+ BICOMP
+ 107
- BICOMP
- 177
+ ICCARM
+ 119
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 182 183
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 186 148 149
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 48 182 183
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 148 149
@@ -674,22 +808,22 @@
$PROJ_DIR$\..\src\common\queue.c
- ICCARM
- 174
+ BICOMP
+ 129
- BICOMP
- 42
+ ICCARM
+ 113
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -697,22 +831,22 @@
$PROJ_DIR$\..\src\common\startup.c
- ICCARM
- 172
+ BICOMP
+ 178
- BICOMP
- 40
+ ICCARM
+ 109
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -720,22 +854,22 @@
$PROJ_DIR$\..\src\common\uif.c
- ICCARM
- 179
+ BICOMP
+ 132
- BICOMP
- 45
+ ICCARM
+ 145
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 182 183
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 148 149
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 182 183
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 148 149
@@ -743,22 +877,22 @@
$PROJ_DIR$\..\src\cpu\arm_cm0.c
- ICCARM
- 195
+ BICOMP
+ 205
- BICOMP
- 199
+ ICCARM
+ 140
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -767,7 +901,7 @@
AARM
- 198
+ 208
@@ -775,22 +909,22 @@
$PROJ_DIR$\..\src\cpu\start.c
- ICCARM
- 194
+ BICOMP
+ 207
- BICOMP
- 200
+ ICCARM
+ 137
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -798,22 +932,22 @@
$PROJ_DIR$\..\src\cpu\sysinit.c
- ICCARM
- 197
+ BICOMP
+ 206
- BICOMP
- 201
+ ICCARM
+ 210
- ICCARM
- 143 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 302 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 143 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 302 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -821,22 +955,735 @@
$PROJ_DIR$\..\src\cpu\vectors.c
- ICCARM
- 196
+ BICOMP
+ 209
- BICOMP
- 202
+ ICCARM
+ 143
- ICCARM
- 144 5 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 303 5 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
+
+ ICCARM
+ 303 5 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\CopyToRam.c
+
BICOMP
- 144 5 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ 244
+
+
+ ICCARM
+ 255
+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\DEFlashPartition.c
+
+
+ BICOMP
+ 245
+
+
+ ICCARM
+ 257
+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\EERAMGetProtection.c
+
+
+ BICOMP
+ 250
+
+
+ ICCARM
+ 260
+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\DFlashGetProtection.c
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\DFlashSetProtection.c
+
+
+ BICOMP
+ 248
+
+
+ ICCARM
+ 258
+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\EEEWrite.c
+
+
+ BICOMP
+ 249
+
+
+ ICCARM
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+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashCommandSequence.c
+
+
+ BICOMP
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+
+
+ ICCARM
+ 263
+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\EERAMSetProtection.c
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashCheckSum.c
+
+
+ BICOMP
+ 252
+
+
+ ICCARM
+ 262
+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseResume.c
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseAllBlock.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseBlock.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashProgram.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseSector.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+ BICOMP
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+ ICCARM
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+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashEraseSuspend.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashInit.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashGetSecurityState.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashProgramCheck.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashReadResource.c
+
+
+ BICOMP
+ 81
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+
+ ICCARM
+ 91
+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashProgramOnce.c
+
+
+ BICOMP
+ 78
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+
+ ICCARM
+ 88
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+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashProgramSection.c
+
+
+ BICOMP
+ 79
+
+
+ ICCARM
+ 89
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+
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashReadOnce.c
+
+
+ BICOMP
+ 80
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\PFlashSwapCtl.c
+
+
+ BICOMP
+ 102
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+
+ ICCARM
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+
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashSecurityBypass.c
+
+
+ BICOMP
+ 82
+
+
+ ICCARM
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+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashVerifyAllBlock.c
+
+
+ BICOMP
+ 83
+
+
+ ICCARM
+ 93
+
+
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashVerifyBlock.c
+
+
+ BICOMP
+ 269
+
+
+ ICCARM
+ 94
+
+
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\FlashVerifySection.c
+
+
+ BICOMP
+ 98
+
+
+ ICCARM
+ 95
+
+
+
+
+ BICOMP
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+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\PFlashGetProtection.c
+
+
+ BICOMP
+ 99
+
+
+ ICCARM
+ 96
+
+
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\PFlashSetProtection.c
+
+
+ BICOMP
+ 100
+
+
+ ICCARM
+ 97
+
+
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\PFlashSwap.c
+
+
+ BICOMP
+ 101
+
+
+ ICCARM
+ 241
+
+
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+
+
+ $PROJ_DIR$\..\src\drivers\FTFx\source\SetEEEEnable.c
+
+
+ BICOMP
+ 103
+
+
+ ICCARM
+ 243
+
+
+
+
+ BICOMP
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
+
+
+ ICCARM
+ 199 196 201 194 123 108 204 200 124 211 172 173 197 198
@@ -844,22 +1691,22 @@
$PROJ_DIR$\..\src\drivers\adc.c
- ICCARM
- 72
+ BICOMP
+ 141
- BICOMP
- 190
+ ICCARM
+ 165
- ICCARM
- 145 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 156 159 165 148
+ BICOMP
+ 304 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 315 318 324 307
- BICOMP
- 145 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 156 159 165 148
+ ICCARM
+ 304 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 315 318 324 307
@@ -867,22 +1714,152 @@
$PROJ_DIR$\..\src\drivers\cmp.c
- ICCARM
- 74
+ BICOMP
+ 139
- BICOMP
- 191
+ ICCARM
+ 164
- ICCARM
- 146 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
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+
+ ICCARM
+ 305 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
+
+
+
+
+ $PROJ_DIR$\..\src\app\time.c
+
BICOMP
- 146 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ 128
+
+
+ ICCARM
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+
+
+
+
+ BICOMP
+ 159 108 204 200 124 211 172 173 174
+
+
+ ICCARM
+ 159 108 204 200 124 211 172 173 174
+
+
+
+
+ $PROJ_DIR$\..\Debug\Exe\plan_manage_main.out
+
+
+ ILINK
+ 156
+
+
+
+
+ ILINK
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+
+
+
+
+ $PROJ_DIR$\..\src\app\getzone.c
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ BICOMP
+ 157 174 108 204 200 124 211 172 173
+
+
+ ICCARM
+ 157 174 108 204 200 124 211 172 173
+
+
+
+
+ $PROJ_DIR$\..\src\app\time64.c
+
+
+ BICOMP
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+
+ ICCARM
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+
+
+
+
+ BICOMP
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+
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+ ICCARM
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+
+
+
+
+ $PROJ_DIR$\..\src\app\clock.c
+
+
+ BICOMP
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+
+
+ ICCARM
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+
+
+
+
+ BICOMP
+ 159 108 204 200 124 211 172 173 174
+
+
+ ICCARM
+ 159 108 204 200 124 211 172 173 174
+
+
+
+
+ $PROJ_DIR$\..\src\common\stdlib.c
+
+
+ BICOMP
+ 179
+
+
+ ICCARM
+ 116
+
+
+
+
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 296 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
+
+
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 296 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -890,22 +1867,22 @@
$PROJ_DIR$\..\src\drivers\dac.c
- ICCARM
- 75
+ BICOMP
+ 138
- BICOMP
- 193
+ ICCARM
+ 163
- ICCARM
- 147 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 306 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 147 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 306 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -913,22 +1890,22 @@
$PROJ_DIR$\..\src\drivers\dma.c
- ICCARM
- 73
+ BICOMP
+ 136
- BICOMP
- 192
+ ICCARM
+ 160
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -936,22 +1913,22 @@
$PROJ_DIR$\..\src\drivers\gpio.c
- ICCARM
- 76
+ BICOMP
+ 185
- BICOMP
- 47
+ ICCARM
+ 236
- ICCARM
- 152 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 167 153 154 145 156 159 165 148
+ BICOMP
+ 311 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 326 312 313 304 315 318 324 307
- BICOMP
- 152 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 167 153 154 145 156 159 165 148
+ ICCARM
+ 311 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 326 312 313 304 315 318 324 307
@@ -959,22 +1936,22 @@
$PROJ_DIR$\..\src\drivers\i2c.c
- ICCARM
- 77
+ BICOMP
+ 130
- BICOMP
- 43
+ ICCARM
+ 225
- ICCARM
- 153 154 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 145 156 159 165 148
+ BICOMP
+ 312 313 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 304 315 318 324 307
- BICOMP
- 153 154 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 145 156 159 165 148
+ ICCARM
+ 312 313 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 304 315 318 324 307
@@ -982,22 +1959,22 @@
$PROJ_DIR$\..\src\drivers\lptmr.c
- ICCARM
- 78
+ BICOMP
+ 187
- BICOMP
- 49
+ ICCARM
+ 218
- ICCARM
- 156 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 159 165 148
+ BICOMP
+ 315 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 318 324 307
- BICOMP
- 156 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 159 165 148
+ ICCARM
+ 315 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 318 324 307
@@ -1005,22 +1982,22 @@
$PROJ_DIR$\..\src\drivers\mcg.c
- ICCARM
- 79
+ BICOMP
+ 131
- BICOMP
- 44
+ ICCARM
+ 237
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 158
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 317
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 158
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 317
@@ -1028,22 +2005,22 @@
$PROJ_DIR$\..\src\drivers\pit.c
- ICCARM
- 80
+ BICOMP
+ 184
- BICOMP
- 46
+ ICCARM
+ 222
- ICCARM
- 159 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 165 148 149
+ BICOMP
+ 318 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 324 307 308
- BICOMP
- 159 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 165 148 149
+ ICCARM
+ 318 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 324 307 308
@@ -1051,22 +2028,22 @@
$PROJ_DIR$\..\src\drivers\port.c
- ICCARM
- 81
+ BICOMP
+ 188
- BICOMP
- 50
+ ICCARM
+ 226
- ICCARM
- 160 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 149 152 167 153 154 145 156 159 165 148
+ BICOMP
+ 319 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 308 311 326 312 313 304 315 318 324 307
- BICOMP
- 160 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 149 152 167 153 154 145 156 159 165 148
+ ICCARM
+ 319 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 308 311 326 312 313 304 315 318 324 307
@@ -1074,22 +2051,22 @@
$PROJ_DIR$\..\src\drivers\rtc.c
- ICCARM
- 82
+ BICOMP
+ 189
- BICOMP
- 51
+ ICCARM
+ 221
- ICCARM
- 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 161
+ BICOMP
+ 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 320
- BICOMP
- 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148 161
+ ICCARM
+ 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307 320
@@ -1097,22 +2074,22 @@
$PROJ_DIR$\..\src\drivers\SPI.c
- ICCARM
- 184
+ BICOMP
+ 190
- BICOMP
- 52
+ ICCARM
+ 150
- ICCARM
- 162 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 321 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 162 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 321 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -1120,22 +2097,22 @@
$PROJ_DIR$\..\src\drivers\systick.c
- ICCARM
- 185
+ BICOMP
+ 191
- BICOMP
- 53
+ ICCARM
+ 151
- ICCARM
- 163 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 322 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 163 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 322 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -1143,22 +2120,22 @@
$PROJ_DIR$\..\src\drivers\tick_timer.c
- ICCARM
- 186
+ BICOMP
+ 192
- BICOMP
- 54
+ ICCARM
+ 135
- ICCARM
- 164 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 163
+ BICOMP
+ 323 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 322
- BICOMP
- 164 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149 163
+ ICCARM
+ 323 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308 322
@@ -1166,22 +2143,22 @@
$PROJ_DIR$\..\src\drivers\tpm.c
- ICCARM
- 187
+ BICOMP
+ 193
- BICOMP
- 55
+ ICCARM
+ 133
- ICCARM
- 165 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 148
+ BICOMP
+ 324 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 307
- BICOMP
- 165 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 148
+ ICCARM
+ 324 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 307
@@ -1189,22 +2166,22 @@
$PROJ_DIR$\..\src\drivers\tsi.c
- ICCARM
- 188
+ BICOMP
+ 166
- BICOMP
- 56
+ ICCARM
+ 134
- ICCARM
- 166 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 325 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 166 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 325 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -1212,22 +2189,22 @@
$PROJ_DIR$\..\src\drivers\uart.c
- ICCARM
- 189
+ BICOMP
+ 162
- BICOMP
- 69
+ ICCARM
+ 142
- ICCARM
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ BICOMP
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
- BICOMP
- 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 155 152 167 153 154 145 156 159 165 148 149
+ ICCARM
+ 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 314 311 326 312 313 304 315 318 324 307 308
@@ -1235,25 +2212,29 @@
$PROJ_DIR$\..\src\other\LandzoOLED.c
- ICCARM
- 70
+ BICOMP
+ 216
- BICOMP
- 71
+ ICCARM
+ 220
- ICCARM
- 171 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148
+ BICOMP
+ 330 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307
- BICOMP
- 171 155 133 142 26 30 29 32 212 33 34 35 132 134 135 136 96 36 140 139 168 157 150 141 144 137 143 151 160 149 152 167 153 154 145 156 159 165 148
+ ICCARM
+ 330 314 291 301 123 108 204 200 124 211 172 173 290 292 293 294 114 174 298 297 327 316 309 299 303 295 302 310 319 308 311 326 312 313 304 315 318 324 307
+
+ $PROJ_DIR$\..\src\app\main.c
+ ICCARM
+
Release
diff --git a/plan_manage_main/ewp/plan_manage_main.ewp b/plan_manage_main/ewp/plan_manage_main.ewp
index d23cd8c..66bd0b1 100644
--- a/plan_manage_main/ewp/plan_manage_main.ewp
+++ b/plan_manage_main/ewp/plan_manage_main.ewp
@@ -171,6 +171,7 @@
DEBUG
IAR
MKL25Z4
+ TWR_KL25Z48M
ARM_MATH_CM0PLUS
@@ -691,7 +693,7 @@
diff --git a/plan_manage_main/ewp/settings/plan_manage_main.dni b/plan_manage_main/ewp/settings/plan_manage_main.dni
index b0411ef..226db47 100644
--- a/plan_manage_main/ewp/settings/plan_manage_main.dni
+++ b/plan_manage_main/ewp/settings/plan_manage_main.dni
@@ -9,7 +9,7 @@ TriggerName=main
LimitSize=0
ByteLimit=50
[DebugChecksum]
-Checksum=-564150124
+Checksum=313747889
[CodeCoverage]
Enabled=_ 0
[Exceptions]
@@ -54,7 +54,8 @@ ShowSource=1
[Disassemble mode]
mode=0
[Breakpoints2]
-Count=0
+Bp0=_ 1 "EMUL_CODE" "{$PROJ_DIR$\..\src\app\flash.c}.143.5" 0 0 1 "" 0 "" 0
+Count=1
[Log file]
LoggingEnabled=_ 0
LogFile=_ ""
diff --git a/plan_manage_main/src/app/NormalDemo_Flash.c b/plan_manage_main/src/app/NormalDemo_Flash.c
new file mode 100644
index 0000000..8692df6
--- /dev/null
+++ b/plan_manage_main/src/app/NormalDemo_Flash.c
@@ -0,0 +1,533 @@
+/****************************************************************************
+ (c) Copyright 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : NormalDemo_Flash.c *
+* DATE : April 08, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.1.0 04.23.2013 FPT Team Initial Version
+1.0.0 11.25.2013 FPT Team Optimize Version
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+*************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+#include "demo_cfg.h"
+
+
+FLASH_SSD_CONFIG flashSSDConfig =
+{
+ FTFx_REG_BASE, /* FTFx control register base */
+ PFLASH_BLOCK_BASE, /* base address of PFlash block */
+ PBLOCK_SIZE, /* size of PFlash block */
+ DEFLASH_BLOCK_BASE, /* base address of DFlash block */
+ 0x0U, /* size of DFlash block */
+ EERAM_BLOCK_BASE, /* base address of EERAM block */
+ 0x0U, /* size of EEE block */
+ DEBUGENABLE, /* background debug mode enable bit */
+ NULL_CALLBACK /* pointer to callback function */
+};
+
+#define CALLBACK_SIZE 0x30U
+#define LAUNCH_CMD_SIZE 0x80U
+
+uint8_t DataArray[PGM_SIZE_BYTE];
+uint8_t buffer[BUFFER_SIZE_BYTE];
+uint32_t gCallBackCnt; /* global counter in callback(). */
+pFLASHCOMMANDSEQUENCE g_FlashLaunchCommand = (pFLASHCOMMANDSEQUENCE)0xFFFFFFFF;
+
+uint16_t __ram_func[LAUNCH_CMD_SIZE/2]; /* array to copy __Launch_Command func to RAM */
+uint16_t __ram_for_callback[CALLBACK_SIZE/2]; /* length of this array depends on total size of the functions need to be copied to RAM*/
+void callback(void);
+
+/*********************************************************************
+*
+* Function Name : main
+* Description : Main function
+*
+* Arguments : void
+* Return Value : UNIT32
+*
+**********************************************************************/
+void main(void)
+{
+ uint32_t ret; /* Return code from each SSD function */
+ uint32_t dest; /* Address of the target location */
+ uint32_t size;
+ uint8_t securityStatus; /* Return protection status */
+ uint32_t protectStatus; /* Store Protection Status Value of PFLSH or DFLASH or EEPROM */
+ uint32_t FailAddr;
+ uint16_t number; /* Number of longword or phrase to be program or verify*/
+ uint32_t sum;
+ uint32_t temp;
+ uint32_t i;
+ uint32_t j;
+
+ gCallBackCnt = 0x0U;
+
+#if ((defined(X_TWR_KV10Z32)) || defined(KM34Z50M_BACES) || (defined(TWR_KL46Z48M)))
+ CACHE_DISABLE
+#else
+ //CACHE_DISABLE
+#endif
+
+ /* Set CallBack to callback function */
+ flashSSDConfig.CallBack = (PCALLBACK)RelocateFunction((uint32_t)__ram_for_callback , CALLBACK_SIZE , (uint32_t)callback);
+ g_FlashLaunchCommand = (pFLASHCOMMANDSEQUENCE)RelocateFunction((uint32_t)__ram_func , LAUNCH_CMD_SIZE ,(uint32_t)FlashCommandSequence);
+
+ /**************************************************************************
+ * FlashInit() *
+ ***************************************************************************/
+ ret = FlashInit(&flashSSDConfig);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+#ifdef twr_mc56f82748
+ PE_low_level_init();
+#endif
+
+#if ((!(defined(FTFA_M))) || (defined(BLOCK_COMMANDS)))
+ /**************************************************************************
+ * FlashEraseBlock() and FlashVerifyBlock() *
+ ***************************************************************************/
+ /* Erase for each individual Pflash block */
+ for (i = 0x1U; i < PBLOCK_NUM; i++)
+ {
+ dest = flashSSDConfig.PFlashBlockBase + BYTE2WORD(i*flashSSDConfig.PFlashBlockSize/PBLOCK_NUM);
+ ret = FlashEraseBlock(&flashSSDConfig, dest, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ /* verification for normal and user margin levels */
+ for (j = 0x0U; j < 0x2U; j++)
+ {
+ ret = FlashVerifyBlock(&flashSSDConfig, dest, j, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ }
+ }
+#endif
+
+ /**************************************************************************
+ * FlashEraseSector() and FlashVerifySection() *
+ ***************************************************************************/
+ /* Erase several sectors on Pflash*/
+ dest = flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize - 0x4U * FTFx_PSECTOR_SIZE);
+ while ((dest + BYTE2WORD(FTFx_PSECTOR_SIZE)) < (flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize)))
+ {
+ size = FTFx_PSECTOR_SIZE;
+ ret = FlashEraseSector(&flashSSDConfig, dest, size, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Verify section for several sector of PFLASH */
+ number = FTFx_PSECTOR_SIZE / PRD1SEC_ALIGN_SIZE;
+ for(i = 0x0U; i < 0x2U; i++)
+ {
+ ret = FlashVerifySection(&flashSSDConfig, dest, number, i, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ }
+ dest += BYTE2WORD(size);
+ }
+
+#if (0x0U != DEBLOCK_SIZE)
+ /* Erase several sectors on Dflash*/
+ dest = flashSSDConfig.DFlashBlockBase;
+ while ((dest + BYTE2WORD(FTFx_DSECTOR_SIZE)) < (flashSSDConfig.DFlashBlockBase + BYTE2WORD(4*FTFx_DSECTOR_SIZE)))
+ {
+ size = FTFx_DSECTOR_SIZE;
+ ret = FlashEraseSector(&flashSSDConfig, dest, size, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Verify section for several sector of DFLASH */
+ number = FTFx_DSECTOR_SIZE/DRD1SEC_ALIGN_SIZE;
+ for(i = 0x0U; i < 0x2U; i ++)
+ {
+ ret = FlashVerifySection(&flashSSDConfig, dest, number, i, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ }
+ dest += BYTE2WORD(FTFx_DSECTOR_SIZE);
+
+ }
+#endif /* DEBLOCK_SIZE */
+
+ /**************************************************************************
+ * FlashProgram() FlashCheckSum and FlashProgramCheck() *
+ ***************************************************************************/
+ /* Initialize source buffer */
+ for (i = 0x0U; i < BUFFER_SIZE_BYTE; i++)
+ {
+ /* Set source buffer */
+ buffer[i] = i;
+ }
+
+ /* Program to the end location of PFLASH */
+ size = BUFFER_SIZE_BYTE;
+ dest = flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize - (uint32_t)(0x3U * FTFx_PSECTOR_SIZE));
+
+ while ((dest + BYTE2WORD(size)) < (flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize)))
+ {
+ ret = FlashProgram(&flashSSDConfig, dest, size, \
+ buffer, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Flash CheckSum */
+ sum = temp = 0x0U;
+ for (i = 0x0U; i < size; i++)
+ {
+ temp += buffer[i];
+ }
+ ret = FlashCheckSum(&flashSSDConfig, dest, size, &sum);
+ if ((FTFx_OK != ret) || (temp != sum))
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Program Check for normal and user margin levels*/
+ for (i = 0x1U; i < 0x3U; i ++)
+ {
+ ret = FlashProgramCheck(&flashSSDConfig, dest, size, buffer, \
+ &FailAddr, i, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ }
+
+ dest += BYTE2WORD(BUFFER_SIZE_BYTE);
+ }
+
+#if (0x0 != DEBLOCK_SIZE)
+ /* Program to the DFLASH block*/
+ size = BUFFER_SIZE_BYTE;
+ dest = flashSSDConfig.DFlashBlockBase;
+ while ((dest + BYTE2WORD(size)) < (flashSSDConfig.DFlashBlockBase + BYTE2WORD(0x4U * FTFx_DSECTOR_SIZE)))
+ {
+ ret = FlashProgram(&flashSSDConfig, dest, size, \
+ buffer, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Flash CheckSum */
+ sum = 0x0U;
+ ret = FlashCheckSum(&flashSSDConfig, dest, size, &sum);
+ if ((FTFx_OK != ret) || (temp != sum))
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Program Check for normal and user margin levels*/
+ for (i = 0x1U; i < 0x3U; i++)
+ {
+ ret = FlashProgramCheck(&flashSSDConfig, dest, size, buffer, \
+ &FailAddr, i, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ }
+ dest += BYTE2WORD(BUFFER_SIZE_BYTE);
+ }
+
+ /**************************************************************************
+ * SetEEEEnable() *
+ ***************************************************************************/
+
+ ret = SetEEEEnable(&flashSSDConfig, RAM_ENABLE ,g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+#endif /* DEBLOCK_SIZE */
+
+#ifndef FTFA_M
+ /**************************************************************************
+ * FlashProgramSection() *
+ ***************************************************************************/
+ /* Write some values to EERAM */
+ for (i = 0x0U; i < 0x100U; i += 0x4U)
+ {
+ WRITE32(flashSSDConfig.EERAMBlockBase + i,0x11223344U);
+ }
+ /* Erase sector for program section */
+ dest = flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize/PBLOCK_NUM - 0x4U * FTFx_PSECTOR_SIZE);
+ ret = FlashEraseSector(&flashSSDConfig, dest, FTFx_PSECTOR_SIZE, \
+ g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Program section to the flash block*/
+ number = 0x2U;
+ ret = FlashProgramSection(&flashSSDConfig, dest, number, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+#endif
+
+#if (0x0U != DEBLOCK_SIZE)
+ /* Erase the first sector of DFlash */
+ dest = flashSSDConfig.DFlashBlockBase;
+ ret = FlashEraseSector(&flashSSDConfig, dest, FTFx_PSECTOR_SIZE, \
+ g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ /* Program the 1st sector of DFLASH */
+ number = FTFx_DSECTOR_SIZE / (DPGMSEC_ALIGN_SIZE * 0x4U);
+ dest = flashSSDConfig.DFlashBlockBase;
+ ret = FlashProgramSection(&flashSSDConfig, dest, number, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+#endif /* DEBLOCK_SIZE */
+
+ /**************************************************************************
+ * FlashGetSecurityState() *
+ ***************************************************************************/
+ securityStatus = 0x0U;
+ ret = FlashGetSecurityState(&flashSSDConfig, &securityStatus);
+
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ /**************************************************************************
+ * FlashReadResource() *
+ ***************************************************************************/
+ /* Read on P-Flash */
+ dest = flashSSDConfig.PFlashBlockBase + PFLASH_IFR; /* Start address of Program Once Field */
+ ret = FlashReadResource(&flashSSDConfig, dest, DataArray, 0x0U, g_FlashLaunchCommand);
+
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+#if (DEBLOCK_SIZE != 0)
+ /* Read on D-Flash */
+ dest = flashSSDConfig.DFlashBlockBase + DFLASH_IFR;
+ ret = FlashReadResource(&flashSSDConfig, dest, DataArray, 0x0U, g_FlashLaunchCommand);
+
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /**************************************************************************
+ * DEFlashPartition() *
+ ***************************************************************************/
+ if (0x0U == flashSSDConfig.EEEBlockSize)
+ {
+ ret = DEFlashPartition(&flashSSDConfig, \
+ EEE_DATA_SIZE_CODE, \
+ DE_PARTITION_CODE, \
+ g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Call FlashInit again to get the new Flash configuration */
+ ret = FlashInit(&flashSSDConfig);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ }
+
+ /**************************************************************************
+ * EEEWrite() *
+ ***************************************************************************/
+ dest = flashSSDConfig.EERAMBlockBase;
+ size = FTFx_WORD_SIZE;
+ ret = EEEWrite(&flashSSDConfig, dest, size, buffer);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /**************************************************************************
+ * EEEWrite() *
+ ***************************************************************************/
+ ret = SetEEEEnable(&flashSSDConfig, EE_ENABLE ,g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ dest = flashSSDConfig.EERAMBlockBase;
+ size = FTFx_WORD_SIZE;
+ ret = EEEWrite(&flashSSDConfig, dest, size, buffer);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /**************************************************************************
+ * EERAMGetProtection() *
+ ***************************************************************************/
+ ret = EERAMGetProtection(&flashSSDConfig, (uint8_t *)&protectStatus);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /**************************************************************************
+ * EERAMSetProtection() *
+ ***************************************************************************/
+ protectStatus = 0xABU;
+ ret = EERAMSetProtection(&flashSSDConfig, (uint8_t)protectStatus);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Call EERAMGetProtection to verify the set step */
+ ret = EERAMGetProtection(&flashSSDConfig, (uint8_t *)&protectStatus);
+ if ((FTFx_OK != ret) || (0xABU != (uint8_t)protectStatus))
+ {
+ ErrorTrap(ret);
+ }
+
+ /**************************************************************************
+ * DFlashGetProtection() *
+ ***************************************************************************/
+ ret = DFlashGetProtection(&flashSSDConfig, (uint8_t *)&protectStatus);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /**************************************************************************
+ * DFlashSetProtection() *
+ ***************************************************************************/
+ protectStatus = 0xAAU;
+ ret = DFlashSetProtection(&flashSSDConfig, (uint8_t)protectStatus);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Call DFlashGetProtection to verify the set step */
+ ret = DFlashGetProtection(&flashSSDConfig, (uint8_t *)&protectStatus);
+ if ((FTFx_OK != ret) || (0xAAU != (uint8_t)protectStatus))
+ {
+ ErrorTrap(ret);
+ }
+
+#endif /* DEBLOCK_SIZE */
+
+ /**************************************************************************
+ * PFlashGetProtection() *
+ ***************************************************************************/
+ ret = PFlashGetProtection(&flashSSDConfig, &protectStatus);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /**************************************************************************
+ * PFlashSetProtection() *
+ ***************************************************************************/
+ protectStatus = 0x12ABCDEFU;
+ ret = PFlashSetProtection(&flashSSDConfig, protectStatus);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Call PFlashGetProtection to verify the set step */
+ ret = PFlashGetProtection(&flashSSDConfig, &protectStatus);
+ if ((FTFx_OK != ret) || (0x12ABCDEFU != protectStatus))
+ {
+ ErrorTrap(ret);
+ }
+
+ /**************************************************************************/
+
+ while(1);
+
+}
+
+/*********************************************************************
+*
+* Function Name : ErrorTrap
+* Description : Gets called when an error occurs.
+* Arguments : uint32_t
+* Return Value :
+*
+*********************************************************************/
+void ErrorTrap(uint32_t ret)
+{
+ while (1)
+ {
+ ;
+ }
+}
+
+
+void callback(void)
+{
+ /* just increase this variable to observer that this callback() func has been involked */
+ gCallBackCnt++;
+}
+/* end of file */
diff --git a/plan_manage_main/src/app/flash.c b/plan_manage_main/src/app/flash.c
index e69de29..6bd2e57 100644
--- a/plan_manage_main/src/app/flash.c
+++ b/plan_manage_main/src/app/flash.c
@@ -0,0 +1,160 @@
+
+
+#include "SSD_FTFx.h"
+
+#include "flash.h"
+
+
+
+FLASH_SSD_CONFIG flashSSDConfig =
+{
+ FTFx_REG_BASE, /* FTFx control register base */
+ PFLASH_BLOCK_BASE, /* base address of PFlash block */
+ PBLOCK_SIZE, /* size of PFlash block */
+ DEFLASH_BLOCK_BASE, /* base address of DFlash block */
+ 0x0U, /* size of DFlash block */
+ EERAM_BLOCK_BASE, /* base address of EERAM block */
+ 0x0U, /* size of EEE block */
+ DEBUGENABLE, /* background debug mode enable bit */
+ NULL_CALLBACK /* pointer to callback function */
+};
+
+#define LAUNCH_CMD_SIZE 0x80U
+
+uint8_t buffer[BUFFER_SIZE_BYTE];
+
+
+pFLASHCOMMANDSEQUENCE g_FlashLaunchCommand = (pFLASHCOMMANDSEQUENCE)0xFFFFFFFF;
+
+uint16_t __ram_func[LAUNCH_CMD_SIZE/2]; /* array to copy __Launch_Command func to RAM */
+
+
+void main(void)
+{
+ uint32_t ret; /* Return code from each SSD function */
+ uint32_t dest; /* Address of the target location */
+ uint32_t size;
+ uint32_t FailAddr;
+ uint16_t number; /* Number of longword or phrase to be program or verify*/
+ uint32_t sum;
+ uint32_t temp;
+ uint32_t i;
+
+
+ g_FlashLaunchCommand = (pFLASHCOMMANDSEQUENCE)RelocateFunction((uint32_t)__ram_func , LAUNCH_CMD_SIZE ,(uint32_t)FlashCommandSequence);
+
+
+ /**************************************************************************
+ * FlashInit() *
+ ***************************************************************************/
+ ret = FlashInit(&flashSSDConfig);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+
+ /*
+ * ³·Ïú±£»¤
+ */
+ //ret = PFlashSetProtection(&flashSSDConfig, 1);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+
+ /**************************************************************************
+ * FlashEraseSector() and FlashVerifySection() *
+ ***************************************************************************/
+ /* Erase several sectors on Pflash*/
+ dest = flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize - 0x3U * FTFx_PSECTOR_SIZE);
+ while ((dest + BYTE2WORD(FTFx_PSECTOR_SIZE)) <= (flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize)))
+ {
+ size = FTFx_PSECTOR_SIZE;
+ ret = FlashEraseSector(&flashSSDConfig, dest, size, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Verify section for several sector of PFLASH */
+ number = FTFx_PSECTOR_SIZE / PRD1SEC_ALIGN_SIZE;
+ for(i = 0x0U; i < 0x2U; i++)
+ {
+ ret = FlashVerifySection(&flashSSDConfig, dest, number, i, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ }
+ dest += BYTE2WORD(size);
+ }
+
+ /**************************************************************************
+ * FlashProgram() FlashCheckSum and FlashProgramCheck() *
+ ***************************************************************************/
+ /* Initialize source buffer */
+ for (i = 0x0U; i < BUFFER_SIZE_BYTE; i++)
+ {
+ /* Set source buffer */
+ buffer[i] = 0x77;
+ }
+
+ /* Program to the end location of PFLASH */
+ size = BUFFER_SIZE_BYTE;
+ dest = flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize - (uint32_t)(0x1U * FTFx_PSECTOR_SIZE));
+
+ while ((dest + BYTE2WORD(size)) <= (flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize)))
+ {
+ ret = FlashProgram(&flashSSDConfig, dest, size, \
+ buffer, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Flash CheckSum */
+ sum = temp = 0x0U;
+ for (i = 0x0U; i < size; i++)
+ {
+ temp += buffer[i];
+ }
+ ret = FlashCheckSum(&flashSSDConfig, dest, size, &sum);
+ if ((FTFx_OK != ret) || (temp != sum))
+ {
+ ErrorTrap(ret);
+ }
+
+ /* Program Check for normal and user margin levels*/
+ for (i = 0x1U; i < 0x3U; i ++)
+ {
+ ret = FlashProgramCheck(&flashSSDConfig, dest, size, buffer, \
+ &FailAddr, i, g_FlashLaunchCommand);
+ if (FTFx_OK != ret)
+ {
+ ErrorTrap(ret);
+ }
+ }
+
+ dest += BYTE2WORD(BUFFER_SIZE_BYTE);
+ }
+
+ while(1);
+}
+
+/*********************************************************************
+*
+* Function Name : ErrorTrap
+* Description : Gets called when an error occurs.
+* Arguments : uint32_t
+* Return Value :
+*
+*********************************************************************/
+void ErrorTrap(uint32_t ret)
+{
+ while (1)
+ {
+ ;
+ }
+}
\ No newline at end of file
diff --git a/plan_manage_main/src/app/include/config.h b/plan_manage_main/src/app/include/config.h
index 3a82fa8..12c611d 100644
--- a/plan_manage_main/src/app/include/config.h
+++ b/plan_manage_main/src/app/include/config.h
@@ -16,10 +16,14 @@
/*
- * µ÷ÊÔÄ£¿é
+ * 8266
*/
-#define DEBUG_UARTX UART1
+#define WIFI_UARTX UART0 // PTA1,PTA2
+/*
+ * µ÷ÊÔÄ£¿é,»òÔÆ̨
+ */
+#define DEBUG_UARTX UART1 // PTC3,PTC4
/*
@@ -34,10 +38,10 @@
#define MR_KEY_PINX PTE30
#define MB_KEY_PINX PTA16
#define MUVB_KEY_PINX PTD6
-
+// knobÓñØÐëÊÇPTA»òPTD¶Ë¿ÚµÄ
#define KNOB_A_PINX PTD6
#define KNOB_B_PINX PTD7
-#define KNOB_KEY_PINX PTD4 // PTD5
+#define KNOB_KEY_PINX PTD4
@@ -54,5 +58,17 @@
#define DS1302_CLK_PINX PTB1
#define DS1302_IO_PINX PTB0
+/*
+ * ¿ØÖÆÖ´ÐÐÄ£¿é
+ *
+ */
+#define LGRED_PINX PTC12
+#define LGBLUE_PINX PTC13
+#define LGUVB_PINX PTC15
+#define WATER_PINX PTC16
+
+/*
+ * led¿ØÖÆ£¬¶àÑ¡¼¸¸öÈÎÒâ¶Ë¿Ú
+ */
#endif // CONFIG_H
diff --git a/plan_manage_main/src/app/include/flash.h b/plan_manage_main/src/app/include/flash.h
index e69de29..daf94af 100644
--- a/plan_manage_main/src/app/include/flash.h
+++ b/plan_manage_main/src/app/include/flash.h
@@ -0,0 +1,85 @@
+/****************************************************************************
+ Copyright (c) 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFL *
+* *
+* FILE NAME : demo_cfg.h *
+* DATE : April 08, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.1.0 04.23.2013 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Finalize to version 1.0.0
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+*************************************************************************/
+
+#ifndef FLASH_H
+#define FLASH_H
+
+#include "common.h"
+
+#define BUFFER_SIZE_BYTE 0x100U
+
+#define EE_ENABLE 0x00U
+#define RAM_ENABLE 0xFFU
+#define DEBUGENABLE 0x00U
+
+#define PSECTOR_SIZE 0x00000400U /* 1 KB size */
+#define DSECTOR_SIZE 0x00000000U
+
+/* FTFL module base */
+#define FTFx_REG_BASE 0x40020000U
+#define PFLASH_BLOCK_BASE 0x00000000U
+#define DEFLASH_BLOCK_BASE 0xFFFFFFFFU
+#define EERAM_BLOCK_BASE 0xFFFFFFFFU
+
+#define PBLOCK_SIZE 0x00020000U /* 128KB size */
+#define EERAM_BLOCK_SIZE 0x00000000U
+
+#define PBLOCK_NUM 1 /* number of individual Pflash block */
+
+/* destination to program security key back to flash location */
+#define SECURITY_LOCATION 0x40CU
+#define BACKDOOR_KEY_LOCATION 0x400U
+
+#define PFLASH_IFR 0xC0U /*Program flash IFR map*/
+
+#define CC_RDCOL_ISR_NUM 21
+
+//#define CACHE_DISABLE
+#define CACHE_DISABLE MCM_PLACR |= MCM_PLACR_DFCDA_MASK;
+
+void ErrorTrap(uint32_t returnCode);
+
+
+#endif /* FLASH_H */
\ No newline at end of file
diff --git a/plan_manage_main/src/app/include/plan_handle.h b/plan_manage_main/src/app/include/plan_handle.h
index e69de29..f4c2af5 100644
--- a/plan_manage_main/src/app/include/plan_handle.h
+++ b/plan_manage_main/src/app/include/plan_handle.h
@@ -0,0 +1,13 @@
+/*
+ * plan_handle.h - 计划处ç†
+ */
+
+
+
+
+
+
+void plan_handle_init(void);
+
+void plan_handle(void);
+
diff --git a/plan_manage_main/src/app/include/pm_time.h b/plan_manage_main/src/app/include/pm_time.h
new file mode 100644
index 0000000..5e8c356
--- /dev/null
+++ b/plan_manage_main/src/app/include/pm_time.h
@@ -0,0 +1,37 @@
+/*
+ * time.h - 时间处ç†
+ */
+
+#include
+
+
+typedef struct calendar_info_
+{
+ uint8_t sec;
+ uint8_t min;
+ uint8_t hour;
+ uint8_t mday;
+ uint8_t month;
+ uint16_t year;
+ uint8_t wday;
+ uint16_t yday;
+} calendar_info;
+
+
+uint8_t is_leapyear(uint16_t year);
+
+uint8_t get_month_days(uint16_t year, uint8_t month);
+
+void ds1302_init(void);
+
+void ds1302_set_time(calendar_info *cal);
+
+void ds1302_read_time(calendar_info *cal);
+
+void maintain_system_time(void);
+
+calendar_info get_system_time(void);
+
+uint32_t calendar_to_sec(calendar_info *cal);
+
+calendar_info sec_to_calendar(uint32_t sec);
diff --git a/plan_manage_main/src/app/include/tft.h b/plan_manage_main/src/app/include/tft.h
index ff0d2d8..1723254 100644
--- a/plan_manage_main/src/app/include/tft.h
+++ b/plan_manage_main/src/app/include/tft.h
@@ -6,6 +6,7 @@
#ifndef TFT_H
#define TFT_H
+enum { PLAN_DATA_NUM = 19 };
typedef struct input_limit_
{
@@ -35,7 +36,9 @@ int16_t *get_value_of_kvp(char *name, uint8_t objn);
input_limit tft_input_limit(char *name);
+//const kv_pair *get_plan_data(uint8_t objn)[][PLAN_DATA_NUM];
+void tft_to_plan_input(uint8_t objn);
diff --git a/plan_manage_main/src/app/include/time.h b/plan_manage_main/src/app/include/time.h
deleted file mode 100644
index 47be519..0000000
--- a/plan_manage_main/src/app/include/time.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * time.h - 时间处ç†
- */
-
-#include
-
-typedef struct time_info_
-{
- uint16_t year;
- uint8_t month;
- uint8_t week;
- uint8_t day;
- uint8_t hour;
- uint8_t minute;
- uint8_t sec;
-} time_info;
-
-
-
-uint8_t is_leapyear(uint16_t year);
-
-uint8_t get_month_days(uint16_t year, uint8_t month);
-
-void ds1302_init(void);
-
-void ds1302_set_time(time_info time);
-
-void ds1302_read_time(time_info *time);
diff --git a/plan_manage_main/src/app/main.c b/plan_manage_main/src/app/main.c
index 32cb04c..f182a91 100644
--- a/plan_manage_main/src/app/main.c
+++ b/plan_manage_main/src/app/main.c
@@ -10,64 +10,77 @@
#include "include/knob.h"
#include "include/tft.h"
#include "include/config.h"
-#include "include/time.h"
+#include "include/pm_time.h"
+#include "include/plan_handle.h"
void main(void)
{
- int32_t log = 0, knob_v;
- time_info time = {
- 2016, 4, 1, 18, 14, 9, 0
- };
pm_init();
st_init(0, COMPARE, 10); // ×÷Ϊ°´¼üɨÃ躯ÊýµÄ¶¨Ê±Ê¹Óã¬ÔÚsimulat_timer.cµÄµ×²ãÖÐʹÓÃ
- st_init(1, COMPARE, 1);
-
- st_init(2, COMPARE, 500);
+ st_init(1, COMPARE, 500);
+ st_init(2, COMPARE, 1);
st_init(3, COMPARE, 500);
- ds1302_set_time(time);
+ calendar_info sys_cal = {
+ 0, 1, 2, 3, 4, 2012, 0, 1
+ };
+ ds1302_set_time(&sys_cal);
knob_enable();
-
+
while (1)
{
-
+ /*
+ * ʱ¼äÒÔ¼°¼Æ»®´¦Àí
+ */
if (st_tcf(1) == 1)
{
+ maintain_system_time();
+
+ calendar_info st= get_system_time();
+ *get_value_of_kvp("st_y", 0) = st.year;
+ *get_value_of_kvp("st_mo", 0) = st.month;
+ *get_value_of_kvp("st_d", 0) = st.mday;
+ *get_value_of_kvp("st_h", 0) = st.hour;
+ *get_value_of_kvp("st_mi", 0) = st.min;
+ *get_value_of_kvp("st_s", 0) = st.sec;
+ tft_page_refresh();
+
+ plan_handle();
+ }
+
+ /*
+ * µ÷ÊÔÏà¹Ø£¬½Ï¶Ìʱ¼äÏìÓ¦
+ */
+ if (st_tcf(2) == 1)
+ {
+ static int32_t log = 0, knob_v;
if (log != (knob_v = get_knob_val()))
{
printf("knob = %d\n", knob_v);
log = knob_v;
}
}
- if (st_tcf(2) == 1)
- {
- enter_critical();
- ds1302_read_time(&time);
- exit_critical();
- printf("%d Äê %d Ô %d ÐÇÆÚ %d ÈÕ %d ʱ %d ·Ö %d Ãë\n",
- time.year,time.month, time.week, time.day,
- time.hour, time.minute, time.sec);
- }
-
+
+ /*
+ * µ÷ÊÔÏà¹Ø£¬½Ï³¤Ê±¼äÏìÓ¦
+ */
if (st_tcf(3) == 1)
{
- enter_critical();
- ds1302_read_time(&time);
- exit_critical();
- *get_value_of_kvp("st_y", 0) = time.year;
- *get_value_of_kvp("st_mo", 0) = time.month;
- *get_value_of_kvp("st_d", 0) = time.day;
- *get_value_of_kvp("st_h", 0) = time.hour;
- *get_value_of_kvp("st_mi", 0) = time.minute;
- *get_value_of_kvp("st_s", 0) = time.sec;
- tft_page_refresh();
+ calendar_info st = get_system_time();
+ printf("%d Äê %d Ô %d ÐÇÆÚ %d ÈÕ %d ʱ %d ·Ö %d Ãë\n",
+ st.year, st.month, st.wday, st.mday,
+ st.hour, st.min, st.sec);
+ printf("sec = %d\n", calendar_to_sec(&st));
}
+ /*
+ * °´¼ü¹¦ÄÜ×¢²á²¿·Ö
+ */
switch (get_key_mean(UP_KEY))
{
case N_KEY:
diff --git a/plan_manage_main/src/app/plan_handle.c b/plan_manage_main/src/app/plan_handle.c
index e69de29..5bc64ba 100644
--- a/plan_manage_main/src/app/plan_handle.c
+++ b/plan_manage_main/src/app/plan_handle.c
@@ -0,0 +1,154 @@
+/*
+ * plan_handle.c - 计划处ç†æ¨¡å—
+ *
+ * 计划处ç†ï¼ŒæŒ‡çš„æ˜¯æ ¹æ®å†…å˜ä¸çš„计划数æ®å’Œæ—¶é—´æ•°æ®å¾—出输出数æ®ï¼Œè¾“出数æ®åŒ…括继电器信
+ * å·ã€æ¤ç‰©å±žæ€§å€¼ã€‚
+ * 关于æ¤ç‰©å±žæ€§å€¼ï¼ŒåŒ…括已完æˆè®¡åˆ’周期次数，ç‰ã€‚
+ * åŸºæœ¬åŽŸåˆ™æ˜¯ï¼Œèµ·å§‹å‘¨æœŸæ—¶é—´åŒºé—´åŠ ä¸Šé‡å¤å‘¨æœŸæ•°å¯ä»¥å¾—到一个区间集åˆï¼Œåˆ¤æ–当å‰æ—¶é—´æ˜¯å¦
+ * 属于这个时间区间集åˆä¸çš„一个区间ä¸çš„一个时间点。由æ¤å¾—到继电器信å·ï¼Œå¹¶åœ¨ç»§ç”µå™¨ä¿¡
+ * å·è¢«ç½®ä¸ºæ— æ•ˆçš„æ—¶å€™å°†è®¡åˆ’å‘¨æœŸæ¬¡æ•°åŠ ä¸€ã€‚
+ * 需è¦è§£å†³çš„问题有，如何访问计划数æ®ä¸Žæ—¶é—´æ•°æ®ï¼Œä»¥åŠå¦‚何写入输出数æ®ã€‚
+ * 计划数æ®åœ¨tft.c模å—，属于é™æ€æ•°æ®ï¼Œå¦‚æžœè¦è®¿é—®çš„è¯ï¼Œæœ‰ä¸¤ç§æ–¹å¼ï¼Œä¸€æ˜¯å£°æ˜Žè®¡åˆ’æ•°æ®
+ * 的类型并返回其整体地å€ï¼Œä¸€ä¸ªæ•´ä½“地å€å¯ä»¥è®¿é—®åˆ°æ‰€æœ‰çš„对象属性，ä¸è¿‡éœ€è¦çŸ¥é“这个地
+ * å€ä¸Šæ•°æ®çš„分布情况，需è¦é¢å¤–çš„æ•°æ®ã€‚äºŒæ˜¯æ ¹æ®æ¯ä¸ªå…ƒç´ çš„åå—通过查询得到其å•ç‹¬çš„值。
+ */
+
+#include
+
+#include "gpio.h"
+
+#include "include/plan_handle.h"
+#include "include/pm_time.h"
+#include "include/tft.h"
+#include "config.h"
+
+typedef struct plan_output_
+{
+ uint8_t is_lgreach;
+ uint8_t is_wtreach;
+ uint8_t lg_cnt;
+ uint8_t wt_cnt;
+} plan_output;
+
+typedef struct plan_input_
+{
+ calendar_info lgbg_t;
+ calendar_info lged_t;
+ calendar_info lgpd_t;
+
+ calendar_info wtbg_t;
+ calendar_info wted_t;
+ calendar_info wtpd_t;
+
+ uint8_t x_orient;
+ uint8_t y_orient;
+ uint8_t lg_r : 1;
+ uint8_t lg_b : 1;
+ uint8_t lg_uvb : 1;
+ uint8_t water : 1;
+ uint8_t sw : 1;
+} plan_input;
+
+static void indata_to_outdata(plan_input *ind, plan_output *outd);
+static void ctr_exe(uint8_t activity);
+
+
+static plan_output plan_out[PLAN_DATA_NUM] = { 0 };
+plan_input plan_in[PLAN_DATA_NUM] = { 0 };
+
+
+
+void plan_handle_init(void)
+{
+ gpio_Interrupt_init(LGRED_PINX, GPO, GPI_DISAB);
+ gpio_Interrupt_init(LGBLUE_PINX, GPO, GPI_DISAB);
+ gpio_Interrupt_init(LGUVB_PINX, GPO, GPI_DISAB);
+ gpio_Interrupt_init(WATER_PINX, GPO, GPI_DISAB);
+ // 还有设置方å‘çš„åˆå§‹åŒ–
+ return;
+}
+
+
+
+static void indata_to_outdata(plan_input *ind, plan_output *outd)
+{
+ calendar_info st = get_system_time();
+ uint32_t sys_sec = calendar_to_sec(&st);
+
+ uint32_t lgpd_sec = calendar_to_sec(&ind->lgpd_t);
+ uint32_t crt_lgbg_sec = calendar_to_sec(&ind->lgbg_t) + lgpd_sec * outd->lg_cnt;
+ uint32_t crt_lged_sec = calendar_to_sec(&ind->lged_t) + lgpd_sec * outd->lg_cnt;
+
+ uint32_t wtpd_sec = calendar_to_sec(&ind->wtpd_t);
+ uint32_t crt_wtbg_sec = calendar_to_sec(&ind->wtbg_t) + wtpd_sec * outd->wt_cnt;
+ uint32_t crt_wted_sec = calendar_to_sec(&ind->wted_t) + wtpd_sec * outd->wt_cnt;
+
+ if (crt_lgbg_sec < sys_sec && crt_lged_sec > sys_sec)
+ {
+ outd->is_lgreach = 1;
+ }
+ else
+ {
+ if (outd->is_lgreach == 1)
+ {
+ outd->lg_cnt++;
+ }
+ outd->is_lgreach = 0;
+ }
+
+ if (crt_wtbg_sec < sys_sec && crt_wted_sec > sys_sec)
+ {
+ outd->is_wtreach = 1;
+ }
+ else
+ {
+ if (outd->is_wtreach== 1)
+ {
+ outd->wt_cnt++;
+ }
+ outd->is_wtreach = 0;
+ }
+ return;
+}
+
+static void ctr_exe(uint8_t activity)
+{
+ if (activity >= PLAN_DATA_NUM)
+ {
+ gpio_set(LGRED_PINX, 0);
+ gpio_set(LGBLUE_PINX, 0);
+ gpio_set(LGUVB_PINX, 0);
+ gpio_set(WATER_PINX, 0);
+ }
+ else
+ {
+ //set_orient(plan_in[activity].x_orient, plan_in[activity].y_orient);
+ gpio_set(LGRED_PINX, plan_in[activity].lg_r);
+ gpio_set(LGBLUE_PINX, plan_in[activity].lg_b);
+ gpio_set(LGUVB_PINX, plan_in[activity].lg_uvb);
+ gpio_set(WATER_PINX, plan_in[activity].water);
+ }
+ return;
+}
+
+
+void plan_handle(void)
+{
+ uint8_t activity = PLAN_DATA_NUM;
+
+ for (uint8_t i = 0; i < PLAN_DATA_NUM; i++)
+ {
+ indata_to_outdata(&plan_in[i], &plan_out[i]);
+ if (plan_in[i].sw == 1)
+ {
+ if (plan_out[i].is_lgreach == 1 || plan_out[i].is_wtreach == 1)
+ {
+ activity = i;
+ break;
+ }
+ }
+ }
+ ctr_exe(activity);
+ return;
+}
+
diff --git a/plan_manage_main/src/app/pm_init.c b/plan_manage_main/src/app/pm_init.c
index 94687d8..f7e5455 100644
--- a/plan_manage_main/src/app/pm_init.c
+++ b/plan_manage_main/src/app/pm_init.c
@@ -8,7 +8,8 @@
#include "include/debug.h"
#include "include/tft.h"
#include "include/config.h"
-#include "include/time.h"
+#include "include/pm_time.h"
+#include "include/plan_handle.h"
/*
@@ -22,5 +23,6 @@ void pm_init(void)
st_base_init();
tft_init();
ds1302_init();
+ plan_handle_init();
return;
}
diff --git a/plan_manage_main/src/app/pm_time.c b/plan_manage_main/src/app/pm_time.c
new file mode 100644
index 0000000..31a97ef
--- /dev/null
+++ b/plan_manage_main/src/app/pm_time.c
@@ -0,0 +1,322 @@
+/*
+ * pm_time.c - 时间处ç†
+ */
+
+#include "gpio.h"
+
+#include "include/pm_time.h"
+#include "include/config.h"
+
+
+
+static calendar_info system_time;
+
+enum { START_YEAR = 2000, SEC_IN_DAY = 24 * 60 * 60};
+#define DAY_IN_YEAR(nyear) (is_leapyear(nyear) ? 366 : 365)
+
+static const uint8_t day_leap[] = {
+ 0, 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
+};
+
+static const uint8_t day_noleap[] = {
+ 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
+};
+
+
+
+static void ds1302_byte_write(uint8_t data);
+static uint8_t ds1302_byte_read(void);
+static uint8_t ds1302_single_read(uint8_t addr);
+static uint8_t ds1302_single_read(uint8_t addr);
+static int16_t ymd_to_wday(int16_t year, int16_t month, int16_t mday);
+
+
+
+
+
+
+uint8_t is_leapyear(uint16_t year)
+{
+ return (year % 4 == 0 && year % 100 != 0) || year % 400 == 0;
+}
+
+uint8_t get_month_days(uint16_t year, uint8_t month)
+{
+ switch (month)
+ {
+ case 4:
+ case 6:
+ case 9:
+ case 11:
+ return 30;
+ case 2:
+ if (is_leapyear(year))
+ return 29;
+ else
+ return 28;
+ default:
+ return 31;
+ }
+}
+
+static void ds1302_byte_write(uint8_t data)
+{
+ gpio_init(DS1302_IO_PINX, 1, 0);
+ for (uint8_t mask = 0x01; mask != 0; mask <<= 1)
+ {
+ gpio_set(DS1302_CLK_PINX, 0);
+ if (data & mask)
+ {
+ gpio_set(DS1302_IO_PINX, 1);
+ }
+ else
+ {
+ gpio_set(DS1302_IO_PINX, 0);
+ }
+ // tdc,200ns,æ•°æ®å»ºç«‹æ—¶é—´,tcl,1000ns,sclk低电平ä¿æŒæ—¶é—´
+ for (uint8_t i = 0; i < 50; i++);
+ gpio_set(DS1302_CLK_PINX, 1);
+ // tcdh,280ns,æ•°æ®é‡‡é›†æ—¶é—´,tch,1000ns,sclk高电平ä¿æŒæ—¶é—´
+ for (uint8_t i = 0; i < 50; i++);
+ }
+ return;
+}
+
+static uint8_t ds1302_byte_read(void)
+{
+ uint8_t data = 0;
+
+ //gpio_init(DS1302_IO_PINX, 0, 1);
+ gpio_Interrupt_init(DS1302_IO_PINX, GPI_UP_PF, GPI_DISAB);
+ gpio_set(DS1302_CLK_PINX, 1);
+ // tccz,280ns,sclk到高阻æ€
+ for (uint8_t i = 0; i < 50; i++);
+ for (uint8_t mask = 0x01; mask != 0; mask <<= 1)
+ {
+ gpio_set(DS1302_CLK_PINX, 0); // 产生下é™æ²¿
+ // tcdd,800ns,æ•°æ®è¾“出延迟
+ for (uint8_t i = 0; i < 50; i++);
+ for (uint8_t i = 0; i < 50; i++);
+ if (gpio_get(DS1302_IO_PINX))
+ {
+ data |= mask;
+ }
+ gpio_set(DS1302_CLK_PINX, 1);
+ // tccz,280ns,sclk到高阻æ€
+ for (uint8_t i = 0; i < 50; i++);
+ }
+ return data;
+}
+
+
+
+
+static uint8_t ds1302_single_read(uint8_t addr)
+{
+ uint8_t cmd = 0,
+ data = 0;
+
+ cmd = (1 << 7) | (addr << 1) | 1;
+ /*
+ * åˆå§‹åŒ–ceå’Œclk状æ€
+ */
+ gpio_set(DS1302_CE_PINX, 0);
+ for (uint8_t i = 0; i < 50; i++);
+ gpio_set(DS1302_CLK_PINX, 0);
+ for (uint8_t i = 0; i < 50; i++);
+
+ gpio_set(DS1302_CE_PINX, 1);
+ // tcc,ce到时钟建立时间，4us
+ for (uint8_t i = 0; i < 200; i++);
+ ds1302_byte_write(cmd);
+ data = ds1302_byte_read();
+ gpio_set(DS1302_CE_PINX, 0);
+ // tcdz,ce到高阻æ€æ—¶é—´ï¼Œ280ns
+ for (uint8_t i = 0; i < 20; i++);
+ return data;
+}
+
+void ds1302_single_write(uint8_t addr, uint8_t data)
+{
+ uint8_t cmd = 0;
+
+ cmd = (1 << 7) | (addr << 1);
+ /*
+ * åˆå§‹åŒ–ceå’Œclk状æ€
+ */
+ gpio_set(DS1302_CE_PINX, 0);
+ for (uint8_t i = 0; i < 50; i++);
+ gpio_set(DS1302_CLK_PINX, 0);
+ for (uint8_t i = 0; i < 50; i++);
+
+ gpio_set(DS1302_CE_PINX, 1);
+ // tcc,ce到时钟建立时间，4us
+ for (uint8_t i = 0; i < 200; i++);
+ ds1302_byte_write(cmd);
+ ds1302_byte_write(data);
+ gpio_set(DS1302_CE_PINX, 0);
+ return;
+}
+
+void ds1302_set_time(calendar_info *cal)
+{
+ ds1302_single_write(7, 0x00);
+ ds1302_single_write(0, cal->sec % 10 + (cal->sec / 10 << 4));
+ ds1302_single_write(1, cal->min % 10 + (cal->min / 10 << 4));
+ ds1302_single_write(2, cal->hour % 10 + (cal->hour / 10 << 4));
+ ds1302_single_write(3, cal->mday % 10 + (cal->mday / 10 << 4));
+ ds1302_single_write(4, cal->month % 10 + (cal->month / 10 << 4));
+ ds1302_single_write(5, cal->wday);
+ ds1302_single_write(6, (cal->year - 2000) % 10 + ((cal->year - 2000) / 10 << 4));
+ return;
+}
+
+void ds1302_read_time(calendar_info *cal)
+{
+ uint8_t rval;
+
+ rval = ds1302_single_read(0);
+ cal->sec = (rval & 0x0f) + ((rval & 0x70) >> 4) * 10;
+ rval = ds1302_single_read(1);
+ cal->min = (rval & 0x0f) + ((rval & 0x70) >> 4) * 10;
+ rval = ds1302_single_read(2);
+ cal->hour = (rval & 0x0f) + ((rval & 0x30) >> 4) * 10;
+ rval = ds1302_single_read(3);
+ cal->mday = (rval & 0x0f) + ((rval & 0x10) >> 4) * 10;
+ rval = ds1302_single_read(4);
+ cal->month = (rval & 0x0f) + ((rval & 0x10) >> 4) * 10;
+ rval = ds1302_single_read(5);
+ cal->wday = rval & 0x07;
+ rval = ds1302_single_read(6);
+ cal->year = (rval & 0x0f) + ((rval & 0xf0) >> 4) * 10 + 2000;
+
+ return;
+}
+
+void ds1302_init(void)
+{
+ //gpio_Interrupt_init(DS1302_CE_PINX, GPO, GPI_DISAB);
+ //gpio_Interrupt_init(DS1302_CLK_PINX, GPO, GPI_DISAB);
+ gpio_init(DS1302_CE_PINX, 1, 0);
+ gpio_init(DS1302_CLK_PINX, 1, 0);
+ gpio_Interrupt_init(DS1302_IO_PINX, GPI_UP_PF, GPI_DISAB);
+ ds1302_single_write(7, 0x00);
+ return;
+}
+
+
+
+/*
+ * 这个函数需è¦æŒ‰æ‰€éœ€çš„时间精度æ¥å®šæ—¶è°ƒç”¨
+ */
+void maintain_system_time(void)
+{
+ enter_critical();
+ ds1302_read_time(&system_time);
+ exit_critical();
+ return;
+}
+
+calendar_info get_system_time(void)
+{
+ return system_time;
+}
+
+
+
+/*************************************************************/
+
+
+uint32_t calendar_to_sec(calendar_info *cal)
+{
+ uint32_t sec = cal->sec;
+ uint32_t year = cal->year;
+ uint32_t month = cal->month;
+
+ if (year < START_YEAR || year > (START_YEAR + 135))
+ return 0;
+
+ sec += (uint32_t)cal->min * 60;
+ sec += (uint32_t)cal->hour * 3600;
+ sec += (uint32_t)(cal->mday - 1) * SEC_IN_DAY;
+ if (is_leapyear(year))
+ {
+ while (month > 1)
+ {
+ sec += (uint32_t)day_leap[--month] * SEC_IN_DAY;
+ }
+ }
+ else
+ {
+ while (month > 1)
+ {
+ sec += (uint32_t)day_noleap[--month] * SEC_IN_DAY;
+ }
+ }
+ while (year > START_YEAR)
+ {
+ sec += (uint32_t)DAY_IN_YEAR(--year) * SEC_IN_DAY;
+ }
+ return sec;
+}
+
+calendar_info sec_to_calendar(uint32_t sec)
+{
+ calendar_info cal;
+ uint32_t day, left;
+
+ cal.year = START_YEAR;
+ cal.month = 1;
+ cal.mday = 1;
+ cal.yday = 1;
+ cal.wday = ymd_to_wday(START_YEAR, 1, 1);
+
+ day = sec / SEC_IN_DAY;
+ left = sec % SEC_IN_DAY;
+
+ cal.wday = (day + cal.wday) % 7;
+
+ cal.hour = left / 3600;
+ cal.min = left / 60 % 60;
+ cal.sec = left % 60;
+
+ while (day >= DAY_IN_YEAR(cal.year))
+ {
+ day -= DAY_IN_YEAR(cal.year++);
+ }
+ cal.yday += day;
+
+ if (is_leapyear(cal.year))
+ {
+ while (day >= day_leap[cal.month])
+ {
+ day -= day_leap[cal.month++];
+ }
+ }
+ else
+ {
+ while (day >= day_noleap[cal.month])
+ {
+ day -= day_noleap[cal.month++];
+ }
+ }
+ cal.mday += day;
+
+ return cal;
+}
+
+
+static int16_t ymd_to_wday(int16_t year, int16_t month, int16_t mday)
+{
+ if (is_leapyear(year))
+ {
+ for (uint8_t i = 1; i < month; i++)
+ mday += day_leap[i];
+ }
+ else
+ {
+ for (uint8_t i = 1; i < month; i++)
+ mday += day_noleap[i];
+ }
+ return (year + year / 4 - year / 100 + year / 400 + mday) % 7;
+}
diff --git a/plan_manage_main/src/app/tft.c b/plan_manage_main/src/app/tft.c
index 0ac7632..0119c41 100644
--- a/plan_manage_main/src/app/tft.c
+++ b/plan_manage_main/src/app/tft.c
@@ -14,7 +14,30 @@
#include "include/knob.h"
#include "include/key.h"
#include "include/config.h"
-#include "include/time.h"
+#include "include/pm_time.h"
+#include "include/plan_handle.h"
+
+typedef struct plan_input_
+{
+ calendar_info lgbg_t;
+ calendar_info lged_t;
+ calendar_info lgpd_t;
+
+ calendar_info wtbg_t;
+ calendar_info wted_t;
+ calendar_info wtpd_t;
+
+ uint8_t x_orient;
+ uint8_t y_orient;
+ uint8_t lg_r : 1;
+ uint8_t lg_b : 1;
+ uint8_t lg_uvb : 1;
+ uint8_t water : 1;
+ uint8_t sw : 1;
+} plan_input;
+
+
+extern plan_input plan_in[PLAN_DATA_NUM];
typedef struct kv_pair_
@@ -58,8 +81,8 @@ static uint8_t menu_lyt[] = { 0, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
static uint8_t obj_set_lyt[] = { 0, 4, 7, 11, 13};
-kv_pair kvp_original[] = { {"ori_0", 0, R_NUM} };
-kv_pair kvp_menu[] = {
+static kv_pair kvp_original[] = { {"ori_0", 0, R_NUM} };
+static kv_pair kvp_menu[] = {
{ "st_y", 2016, RW_NUM }, { "st_mo", 4, RW_NUM }, { "st_d", 14, RW_NUM }, { "st_h", 0, RW_NUM }, { "st_mi", 0, RW_NUM }, { "st_s", 0, RW_NUM },
{ "obj0", 0, SW_PAGE },
{ "obj1", 1, SW_PAGE },
@@ -72,7 +95,7 @@ kv_pair kvp_menu[] = {
{ "note", 0, RW_NUM }
};
-kv_pair kvp_obj_set[][19] =
+static kv_pair kvp_obj_set[][PLAN_DATA_NUM] =
{
{
{ "lg_r", 0, RW_PIC}, { "lg_b", 0, RW_PIC }, { "lg_uvb", 0, RW_PIC }, { "water", 0, RW_PIC },
@@ -134,6 +157,14 @@ kv_pair kvp_obj_set[][19] =
static char tft_cmd_str[20];
+static void tft_send_cmd(const char *cmd);
+static void tft_set_color(uint8_t etn, tft_colour tft_col);
+static void tft_input(void);
+
+
+
+
+
/*
*
*/
@@ -147,7 +178,7 @@ void tft_init(void)
/*
*
*/
-void tft_send_cmd(const char *cmd)
+static void tft_send_cmd(const char *cmd)
{
uart_sendStr(TFT_UARTX, (const uint8_t *)cmd);
@@ -156,7 +187,7 @@ void tft_send_cmd(const char *cmd)
uart_putchar(TFT_UARTX, 0xff);
}
-void tft_set_color(uint8_t etn, tft_colour tft_col)
+static void tft_set_color(uint8_t etn, tft_colour tft_col)
{
switch (tft_stt.pgn)
{
@@ -532,7 +563,7 @@ void tft_ret(void)
}
-void tft_input(void)
+static void tft_input(void)
{
input_limit in_lmt;
int16_t in_v, bg_v;
@@ -576,14 +607,14 @@ void tft_input(void)
}
knob_disable();
tft_set_color(tft_stt.etn, TFT_PURPLE);
- time_info time;
- time.year = *get_value_of_kvp("st_y", 0);
- time.month = *get_value_of_kvp("st_mo", 0);
- time.day = *get_value_of_kvp("st_d", 0);
- time.hour = *get_value_of_kvp("st_h", 0);
- time.minute = *get_value_of_kvp("st_mi", 0);
- time.sec= *get_value_of_kvp("st_s", 0);
- ds1302_set_time(time);
+ calendar_info cal;
+ cal.year = *get_value_of_kvp("st_y", 0);
+ cal.month = *get_value_of_kvp("st_mo", 0);
+ cal.mday = *get_value_of_kvp("st_d", 0);
+ cal.hour = *get_value_of_kvp("st_h", 0);
+ cal.min = *get_value_of_kvp("st_mi", 0);
+ cal.sec= *get_value_of_kvp("st_s", 0);
+ ds1302_set_time(&cal);
clear_key_m();
break;
case RW_PIC:
@@ -642,6 +673,7 @@ void tft_input(void)
}
knob_disable();
tft_set_color(tft_stt.etn, TFT_PURPLE);
+ //tft_to_plan_input(tft_stt.objn);
clear_key_m();
break;
case RW_PIC:
@@ -659,8 +691,8 @@ void tft_input(void)
tft_send_cmd(tft_cmd_str);
}
}
-
tft_set_color(tft_stt.etn, TFT_PURPLE);
+ tft_to_plan_input(tft_stt.objn);
clear_key_m();
break;
case SW_PAGE:
@@ -928,3 +960,53 @@ input_limit tft_input_limit(char *name)
}
return in_lmt;
}
+
+
+//const kv_pair *get_plan_data(uint8_t objn)[][18]
+//{
+ //return (const kv_pair *[][18])kvp_obj_set;
+//}
+
+uint8_t get_obj_num(void)
+{
+ return sizeof(kvp_obj_set) / sizeof(kvp_obj_set[0]);
+}
+
+
+/*
+ * ½«tftÏÔʾµÄÊý¾ÝÌáÈ¡µ½¼Æ»®´¦ÀíµÄÊäÈëÊý¾Ý½á¹¹ÖУ¬Õâ¸öº¯ÊýÓ¦¸ÃÔÚtftÊäÈëÓиıäÊDZ»µ÷
+ * 
+ */
+void tft_to_plan_input(uint8_t objn)
+{
+ plan_in[objn].lgbg_t.year = *get_value_of_kvp("bg_y", objn);
+ plan_in[objn].lgbg_t.month = *get_value_of_kvp("bg_mo", objn);
+ plan_in[objn].lgbg_t.mday = *get_value_of_kvp("bg_d", objn);
+ plan_in[objn].lgbg_t.hour = *get_value_of_kvp("bg_h", objn);
+ plan_in[objn].lgbg_t.min = *get_value_of_kvp("bg_mi", objn);
+ //plan_in[objn].bg_t.sec = *get_value_kvp("bg_s", objn);
+
+ plan_in[objn].lged_t.year = *get_value_of_kvp("ed_y", objn);
+ plan_in[objn].lged_t.month = *get_value_of_kvp("ed_mo", objn);
+ plan_in[objn].lged_t.mday = *get_value_of_kvp("ed_d", objn);
+ plan_in[objn].lged_t.hour = *get_value_of_kvp("ed_h", objn);
+ plan_in[objn].lged_t.min = *get_value_of_kvp("ed_mi", objn);
+ //plan_in[objn].ed_t.sec = *get_value_of_kvp("ed_s", objn);
+
+ plan_in[objn].lgpd_t.hour = *get_value_of_kvp("pd_h", objn);
+ plan_in[objn].lgpd_t.min = *get_value_of_kvp("pd_mi", objn);
+
+ plan_in[objn].lg_r = *get_value_of_kvp("lg_r", objn);
+ plan_in[objn].lg_b = *get_value_of_kvp("lg_b)", objn);
+ plan_in[objn].lg_uvb = *get_value_of_kvp("lg_uvb", objn);
+ plan_in[objn].water = *get_value_of_kvp("water", objn);
+
+ plan_in[objn].sw = *get_value_of_kvp("obj_sw", objn);
+ return;
+}
+
+
+
+
+
+
diff --git a/plan_manage_main/src/app/time.c b/plan_manage_main/src/app/time.c
deleted file mode 100644
index 1e510c3..0000000
--- a/plan_manage_main/src/app/time.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * time.c - 时间处ç†
- */
-
-#include "gpio.h"
-
-#include "include/time.h"
-#include "include/config.h"
-
-
-uint8_t is_leapyear(uint16_t year)
-{
- return (year % 4 == 0 && year % 100 != 0) || year % 400 == 0;
-}
-
-uint8_t get_month_days(uint16_t year, uint8_t month)
-{
- switch (month)
- {
- case 4:
- case 6:
- case 9:
- case 11:
- return 30;
- case 2:
- if (is_leapyear(year))
- return 29;
- else
- return 28;
- default:
- return 31;
- }
-}
-
-void ds1302_byte_write(uint8_t data)
-{
- gpio_init(DS1302_IO_PINX, 1, 0);
- for (uint8_t mask = 0x01; mask != 0; mask <<= 1)
- {
- gpio_set(DS1302_CLK_PINX, 0);
- if (data & mask)
- {
- gpio_set(DS1302_IO_PINX, 1);
- }
- else
- {
- gpio_set(DS1302_IO_PINX, 0);
- }
- // tdc,200ns,æ•°æ®å»ºç«‹æ—¶é—´,tcl,1000ns,sclk低电平ä¿æŒæ—¶é—´
- for (uint8_t i = 0; i < 50; i++);
- gpio_set(DS1302_CLK_PINX, 1);
- // tcdh,280ns,æ•°æ®é‡‡é›†æ—¶é—´,tch,1000ns,sclk高电平ä¿æŒæ—¶é—´
- for (uint8_t i = 0; i < 50; i++);
- }
- return;
-}
-
-uint8_t ds1302_byte_read(void)
-{
- uint8_t data = 0;
-
- //gpio_init(DS1302_IO_PINX, 0, 1);
- gpio_Interrupt_init(DS1302_IO_PINX, GPI_UP_PF, GPI_DISAB);
- gpio_set(DS1302_CLK_PINX, 1);
- // tccz,280ns,sclk到高阻æ€
- for (uint8_t i = 0; i < 50; i++);
- for (uint8_t mask = 0x01; mask != 0; mask <<= 1)
- {
- gpio_set(DS1302_CLK_PINX, 0); // 产生下é™æ²¿
- // tcdd,800ns,æ•°æ®è¾“出延迟
- for (uint8_t i = 0; i < 50; i++);
- for (uint8_t i = 0; i < 50; i++);
- if (gpio_get(DS1302_IO_PINX))
- {
- data |= mask;
- }
- gpio_set(DS1302_CLK_PINX, 1);
- // tccz,280ns,sclk到高阻æ€
- for (uint8_t i = 0; i < 50; i++);
- }
- return data;
-}
-
-
-
-
-uint8_t ds1302_single_read(uint8_t addr)
-{
- uint8_t cmd = 0,
- data = 0;
-
- cmd = (1 << 7) | (addr << 1) | 1;
- /*
- * åˆå§‹åŒ–ceå’Œclk状æ€
- */
- gpio_set(DS1302_CE_PINX, 0);
- for (uint8_t i = 0; i < 50; i++);
- gpio_set(DS1302_CLK_PINX, 0);
- for (uint8_t i = 0; i < 50; i++);
-
- gpio_set(DS1302_CE_PINX, 1);
- // tcc,ce到时钟建立时间，4us
- for (uint8_t i = 0; i < 200; i++);
- ds1302_byte_write(cmd);
- data = ds1302_byte_read();
- gpio_set(DS1302_CE_PINX, 0);
- // tcdz,ce到高阻æ€æ—¶é—´ï¼Œ280ns
- for (uint8_t i = 0; i < 20; i++);
- return data;
-}
-
-void ds1302_single_write(uint8_t addr, uint8_t data)
-{
- uint8_t cmd = 0;
-
- cmd = (1 << 7) | (addr << 1);
- /*
- * åˆå§‹åŒ–ceå’Œclk状æ€
- */
- gpio_set(DS1302_CE_PINX, 0);
- for (uint8_t i = 0; i < 50; i++);
- gpio_set(DS1302_CLK_PINX, 0);
- for (uint8_t i = 0; i < 50; i++);
-
- gpio_set(DS1302_CE_PINX, 1);
- // tcc,ce到时钟建立时间，4us
- for (uint8_t i = 0; i < 200; i++);
- ds1302_byte_write(cmd);
- ds1302_byte_write(data);
- gpio_set(DS1302_CE_PINX, 0);
- return;
-}
-
-void ds1302_set_time(time_info time)
-{
- ds1302_single_write(7, 0x00);
- ds1302_single_write(0, time.sec % 10 + (time.sec / 10 << 4));
- ds1302_single_write(1, time.minute % 10 + (time.minute / 10 << 4));
- ds1302_single_write(2, time.hour % 10 + (time.hour / 10 << 4));
- ds1302_single_write(3, time.day % 10 + (time.day / 10 << 4));
- ds1302_single_write(4, time.month % 10 + (time.month / 10 << 4));
- ds1302_single_write(5, time.week);
- ds1302_single_write(6, (time.year - 2000) % 10 + ((time.year - 2000) / 10 << 4));
- return;
-}
-
-void ds1302_read_time(time_info *time)
-{
- uint8_t rval;
-
- rval = ds1302_single_read(0);
- (*time).sec = (rval & 0x0f) + ((rval & 0x70) >> 4) * 10;
- rval = ds1302_single_read(1);
- (*time).minute = (rval & 0x0f) + ((rval & 0x70) >> 4) * 10;
- rval = ds1302_single_read(2);
- (*time).hour = (rval & 0x0f) + ((rval & 0x30) >> 4) * 10;
- rval = ds1302_single_read(3);
- (*time).day = (rval & 0x0f) + ((rval & 0x10) >> 4) * 10;
- rval = ds1302_single_read(4);
- (*time).month = (rval & 0x0f) + ((rval & 0x10) >> 4) * 10;
- rval = ds1302_single_read(5);
- (*time).week = rval & 0x07;
- rval = ds1302_single_read(6);
- (*time).year = (rval & 0x0f) + ((rval & 0xf0) >> 4) * 10 + 2000;
-
- return;
-}
-
-void ds1302_init(void)
-{
- //gpio_Interrupt_init(DS1302_CE_PINX, GPO, GPI_DISAB);
- //gpio_Interrupt_init(DS1302_CLK_PINX, GPO, GPI_DISAB);
- gpio_init(DS1302_CE_PINX, 1, 0);
- gpio_init(DS1302_CLK_PINX, 1, 0);
- gpio_Interrupt_init(DS1302_IO_PINX, GPI_UP_PF, GPI_DISAB);
- ds1302_single_write(7, 0x00);
- return;
-}
diff --git a/plan_manage_main/src/drivers/FTFx/include/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h b/plan_manage_main/src/drivers/FTFx/include/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h
new file mode 100644
index 0000000..0af4467
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/include/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h
@@ -0,0 +1,197 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 11.27.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_256_128_64K_32K_2K_2K_1K_H_
+#define _FTFx_KX_256_128_64K_32K_2K_2K_1K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_256_128_64K_32K_2K_2K_1K
+ * @{
+ */
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00008000U /* 32 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00000000U
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00008000U
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0x00006000U
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0x00004000U
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00000000U
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0x00002000U
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0x00004000U
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00008000U /* Default value */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a function */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_(128_64_32)K_32K_2K_1K_1K_H_ */
diff --git a/plan_manage_main/src/drivers/FTFx/include/FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h b/plan_manage_main/src/drivers/FTFx/include/FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h
new file mode 100644
index 0000000..7000232
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/include/FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h
@@ -0,0 +1,116 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 11.27.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM0PLUS to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_256_128_64_32_16_8K_0K_0K_1K_0K_H_
+#define _FTFx_KX_256_128_64_32_16_8K_0K_0K_1K_0K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_256_128_64_32_16_8K_0K_0K_1K_0K
+ * @{
+ */
+
+/*! @brief this is FTFA module, so some commands are not available */
+#define FTFA_M
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00000000U /* 0 KB size */
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+/*! @}*/
+#endif /* _FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K_H_ */
diff --git a/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx.h b/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx.h
new file mode 100644
index 0000000..136bee3
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx.h
@@ -0,0 +1,945 @@
+/****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SSD_FTFx.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+0.1.0 06.11.2010 FPT Team Finalize to 0.1.0
+0.1.1 08.16.2010 FPT Team Finalize to 0.1.1
+0.1.2 08.26.2010 FPT Team Finalize to 0.1.2
+0.1.3 09.16.2010 FPT Team Updated to support little Indian
+0.2.0 06.27.2010 FPT Team Finalize to 0.2.0
+0.2.1 01.28.2011 FPT Team Updated to support
+ FTFx_KX_512K_0K_0K,
+ FTFx_JX_128K_32K_2K,
+ and FTFx_FX_256K_32K_2K
+ derivatives.
+0.2.2 04.18.2011 FPT Team Add swap control code definitions
+ of FTFx_PFLASH_SWAP.
+0.2.3 09.15.2011 FPT Team Add command for program phrase
+0.2.4 03.16.2013 FPT Team Remove define Flash margin read settings
+ Add GETINDEX macro.
+1.0.0 12.25.2013 FPT Team Swap content of SSD_FTFx_Internal.h and SSD_FTFx.h to optimize include structure in c source file
+ Update to simplify including driver
+ header files for source files
+ Add definitions FTFx_SSD_FSTAT_ERROR_BITS
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add function Prototypes for Flash SSD
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+#ifndef _SSD_FTFx_INTERNAL_H_
+#define _SSD_FTFx_INTERNAL_H_
+
+#include "SSD_FTFx_Internal.h"
+
+#define FTFx_SSD_FSTAT_CCIF 0x80U
+#define FTFx_SSD_FSTAT_RDCOLERR 0x40U
+#define FTFx_SSD_FSTAT_ACCERR 0x20U
+#define FTFx_SSD_FSTAT_FPVIOL 0x10U
+#define FTFx_SSD_FSTAT_MGSTAT0 0x01U
+#define FTFx_SSD_FSTAT_ERROR_BITS (FTFx_SSD_FSTAT_ACCERR \
+ |FTFx_SSD_FSTAT_FPVIOL \
+ |FTFx_SSD_FSTAT_MGSTAT0)
+
+#define FTFx_SSD_FCNFG_CCIE 0x80U
+#define FTFx_SSD_FCNFG_RDCOLLIE 0x40U
+#define FTFx_SSD_FCNFG_ERSAREQ 0x20U
+#define FTFx_SSD_FCNFG_ERSSUSP 0x10U
+#define FTFx_SSD_FCNFG_RAMRDY 0x02U
+#define FTFx_SSD_FCNFG_EEERDY 0x01U
+
+#define FTFx_SSD_FSEC_KEYEN 0xC0U
+#define FTFx_SSD_FSEC_FSLACC 0x0CU
+#define FTFx_SSD_FSEC_SEC 0x03U
+
+/*--------------- FTFx Flash Module Memory Offset Map -----------------*/
+#if(BIG_ENDIAN == ENDIANNESS) /* Big Endian - coldfire CPU */
+ /* Flash Status Register (FSTAT)*/
+ #define FTFx_SSD_FSTAT_OFFSET 0x00000003U
+ /* Flash configuration register (FCNFG)*/
+ #define FTFx_SSD_FCNFG_OFFSET 0x00000002U
+ /* Flash security register (FSEC) */
+ #define FTFx_SSD_FSEC_OFFSET 0x00000001U
+ /* Flash Option Register (FOPT) */
+ #define FTFx_SSD_FOPT_OFFSET 0x00000000U
+ /* Flash common command object registers (FCCOB0-B) */
+ #define FTFx_SSD_FCCOB0_OFFSET 0x00000004U
+ #define FTFx_SSD_FCCOB1_OFFSET 0x00000005U
+ #define FTFx_SSD_FCCOB2_OFFSET 0x00000006U
+ #define FTFx_SSD_FCCOB3_OFFSET 0x00000007U
+ #define FTFx_SSD_FCCOB4_OFFSET 0x00000008U
+ #define FTFx_SSD_FCCOB5_OFFSET 0x00000009U
+ #define FTFx_SSD_FCCOB6_OFFSET 0x0000000AU
+ #define FTFx_SSD_FCCOB7_OFFSET 0x0000000BU
+ #define FTFx_SSD_FCCOB8_OFFSET 0x0000000CU
+ #define FTFx_SSD_FCCOB9_OFFSET 0x0000000DU
+ #define FTFx_SSD_FCCOBA_OFFSET 0x0000000EU
+ #define FTFx_SSD_FCCOBB_OFFSET 0x0000000FU
+ /* P-Flash protection registers (FPROT0-3) */
+ #define FTFx_SSD_FPROT0_OFFSET 0x00000010U
+ #define FTFx_SSD_FPROT1_OFFSET 0x00000011U
+ #define FTFx_SSD_FPROT2_OFFSET 0x00000012U
+ #define FTFx_SSD_FPROT3_OFFSET 0x00000013U
+ /* D-Flash protection registers (FDPROT) */
+ #define FTFx_SSD_FDPROT_OFFSET 0x00000014U
+ /* EERAM Protection Register (FEPROT) */
+ #define FTFx_SSD_FEPROT_OFFSET 0x00000015U
+
+#else /* Little Endian - kinetis CPU + Nevis2 CPU */
+ /* Flash Status Register (FSTAT)*/
+ #define FTFx_SSD_FSTAT_OFFSET 0x00000000U
+ /* Flash configuration register (FCNFG)*/
+ #define FTFx_SSD_FCNFG_OFFSET 0x00000001U
+ /* Flash security register (FSEC) */
+ #define FTFx_SSD_FSEC_OFFSET 0x00000002U
+ /* Flash Option Register (FOPT) */
+ #define FTFx_SSD_FOPT_OFFSET 0x00000003U
+ /* Flash common command object registers (FCCOB0-B) */
+ #define FTFx_SSD_FCCOB0_OFFSET 0x00000007U
+ #define FTFx_SSD_FCCOB1_OFFSET 0x00000006U
+ #define FTFx_SSD_FCCOB2_OFFSET 0x00000005U
+ #define FTFx_SSD_FCCOB3_OFFSET 0x00000004U
+ #define FTFx_SSD_FCCOB4_OFFSET 0x0000000BU
+ #define FTFx_SSD_FCCOB5_OFFSET 0x0000000AU
+ #define FTFx_SSD_FCCOB6_OFFSET 0x00000009U
+ #define FTFx_SSD_FCCOB7_OFFSET 0x00000008U
+ #define FTFx_SSD_FCCOB8_OFFSET 0x0000000FU
+ #define FTFx_SSD_FCCOB9_OFFSET 0x0000000EU
+ #define FTFx_SSD_FCCOBA_OFFSET 0x0000000DU
+ #define FTFx_SSD_FCCOBB_OFFSET 0x0000000CU
+ /* P-Flash protection registers (FPROT0-3) */
+ #define FTFx_SSD_FPROT0_OFFSET 0x00000013U
+ #define FTFx_SSD_FPROT1_OFFSET 0x00000012U
+ #define FTFx_SSD_FPROT2_OFFSET 0x00000011U
+ #define FTFx_SSD_FPROT3_OFFSET 0x00000010U
+ /* D-Flash protection registers (FDPROT) */
+ #define FTFx_SSD_FDPROT_OFFSET 0x00000017U
+ /* EERAM Protection Register (FEPROT) */
+ #define FTFx_SSD_FEPROT_OFFSET 0x00000016U
+#endif
+
+/* fccob offset address to store resource code */
+#if (PGM_SIZE_BYTE == FTFx_PHRASE_SIZE)
+ #define RSRC_CODE_OFSSET FTFx_SSD_FCCOB4_OFFSET
+#else
+ #define RSRC_CODE_OFSSET FTFx_SSD_FCCOB8_OFFSET
+#endif
+
+/*------------- Flash hardware algorithm operation commands -------------*/
+#define FTFx_VERIFY_BLOCK 0x00U
+#define FTFx_VERIFY_SECTION 0x01U
+#define FTFx_PROGRAM_CHECK 0x02U
+#define FTFx_READ_RESOURCE 0x03U
+#define FTFx_PROGRAM_LONGWORD 0x06U
+#define FTFx_PROGRAM_PHRASE 0x07U
+#define FTFx_ERASE_BLOCK 0x08U
+#define FTFx_ERASE_SECTOR 0x09U
+#define FTFx_PROGRAM_SECTION 0x0BU
+#define FTFx_VERIFY_ALL_BLOCK 0x40U
+#define FTFx_READ_ONCE 0x41U
+#define FTFx_PROGRAM_ONCE 0x43U
+#define FTFx_ERASE_ALL_BLOCK 0x44U
+#define FTFx_SECURITY_BY_PASS 0x45U
+#define FTFx_PFLASH_SWAP 0x46U
+#define FTFx_PROGRAM_PARTITION 0x80U
+#define FTFx_SET_EERAM 0x81U
+
+
+
+/* EERAM Function Control Code */
+#define EEE_ENABLE 0x00U
+#define EEE_DISABLE 0xFFU
+
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name PFlash swap control codes
+ * @{
+ */
+/*! @brief Initialize Swap System control code */
+#define FTFx_SWAP_SET_INDICATOR_ADDR 0x01U
+/*! @brief Set Swap in Update State */
+#define FTFx_SWAP_SET_IN_PREPARE 0x02U
+/*! @brief Set Swap in Complete State */
+#define FTFx_SWAP_SET_IN_COMPLETE 0x04U
+/*! @brief Report Swap Status */
+#define FTFx_SWAP_REPORT_STATUS 0x08U
+
+/*@}*/
+
+/*!
+ * @name PFlash swap states
+ * @{
+ */
+/*! @brief Uninitialized swap mode */
+#define FTFx_SWAP_UNINIT 0x00U
+/*! @brief Ready swap mode */
+#define FTFx_SWAP_READY 0x01U
+/*! @brief Update swap mode */
+#define FTFx_SWAP_UPDATE 0x02U
+/*! @brief Update-Erased swap mode */
+#define FTFx_SWAP_UPDATE_ERASED 0x03U
+/*! @brief Complete swap mode */
+#define FTFx_SWAP_COMPLETE 0x04U
+
+/*@}*/
+
+/*------------------- Setting flash interrupt macro --------------------*/
+/*!
+* @brief Set the Flash interrupt enable bits in the FCNFG register
+*
+* @param ftfxRegBase: Specify register base address of flash module
+* @param value: The bit map value ( 0: disabled, 1 enabled) .
+* The numbering is marked from 0 to 7 where bit 0
+* is the least significant bit. Bit 7 is corresponding
+* to command complete interrupt. Bit 6 is corresponding
+* to read collision error interrupt.
+*/
+#define SET_FLASH_INT_BITS(ftfxRegBase, value) REG_WRITE((ftfxRegBase) + FTFx_SSD_FCNFG_OFFSET,\
+ ((value)&(FTFx_SSD_FCNFG_CCIE | FTFx_SSD_FCNFG_RDCOLLIE)))
+/*!
+* @brief Return the Flash interrupt enable bits in the FCNFG register
+*
+* @param ftfxRegBase: Specify register base address of flash module
+*/
+#define GET_FLASH_INT_BITS(ftfxRegBase) REG_READ((ftfxRegBase) + FTFx_SSD_FCNFG_OFFSET) &\
+ (FTFx_SSD_FCNFG_CCIE | FTFx_SSD_FCNFG_RDCOLLIE)
+
+/*!
+ * @name C90TFS Flash driver APIs
+ * @{
+ */
+
+/*---------------- Function Prototypes for Flash SSD --------------------*/
+/*!
+ * @brief Relocate a function to RAM address.
+ *
+ * This function provides users a facility to relocate a function from one location
+ * to another location in RAM.
+ *
+ * @param dest: Destination address where you want to place the function .
+ * @param size: Size of the function
+ * @param src: Address of the function will be relocated
+ * @return Relocated address of the function .
+ */
+extern uint32_t RelocateFunction(uint32_t dest, uint32_t size, uint32_t src);
+/*!
+ * @brief Flash initialization.
+ *
+ * This API will initialize flash module by clearing status error
+ * bit and reporting the memory configuration via SSD configuration structure.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t FlashInit(PFLASH_SSD_CONFIG pSSDConfig);
+
+/*!
+ * @brief Flash command sequence.
+ *
+ * This API is used to perform command write sequence on the flash.
+ * It is internal function, called by driver APIs only
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @return Successful completion (FTFx_OK)
+ * @return Failed in flash command execution (FTFx_ERR_ACCERR, FTFx_ERR_PVIOL,
+ * FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashCommandSequence(PFLASH_SSD_CONFIG pSSDConfig);
+/*!
+ * @brief P-Flash get protection.
+ *
+ * This API retrieves current P-Flash protection status. Considering
+ * the time consumption for getting protection is very low and even can
+ * be ignored, it is not necessary to utilize the Callback function to
+ * support the time-critical events.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param protectStatus: To return the current value of the P-Flash Protection.
+ * Each bit is corresponding
+ * to protection of 1/32 of the total P-Flash. The least
+ * significant bit is corresponding to the lowest
+ * address area of P-Flash. The most significant bit
+ * is corresponding to the highest address area of P-
+ * Flash and so on. There are two possible cases as below:
+ * - 0: this area is protected.
+ * - 1: this area is unprotected.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t PFlashGetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t* protectStatus);
+
+/*!
+ * @brief P-Flash set protection.
+ *
+ * This API sets the P-Flash protection to the intended protection status.
+ * Setting P-Flash protection status is subject to a protection transition
+ * restriction. If there is any setting violation, it will return
+ * an error code and the current protection status won’t be changed.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param protectStatus: The expected protect status user wants to set to
+ * P-Flash protection register. Each bit is corresponding
+ * to protection of 1/32 of the total P-Flash. The least
+ * significant bit is corresponding to the lowest
+ * address area of P-Flash. The most significant bit
+ * is corresponding to the highest address area of P-
+ * Flash and so on. There are two possible cases as below:
+ * - 0: this area is protected.
+ * - 1: this area is unprotected.
+ * @return Successful completion (FTFx_OK )
+ * @return Error value (FTFx_ERR_CHANGEPROT)
+ */
+extern uint32_t PFlashSetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t protectStatus);
+
+/*!
+ * @brief Flash get security state.
+ *
+ * This API retrieves the current Flash security status, including
+ * the security enabling state and the back door key enabling state.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param securityState: To return the current security status code.
+ * FLASH_NOT_SECURE (0x01): Flash currently not in secure state;
+ * FLASH_SECURE_BACKDOOR_ENABLED (0x02): Flash is secured and
+ * back door key access enabled;
+ * FLASH_SECURE_BACKDOOR_DISABLED (0x04): Flash is secured and
+ * back door key access disabled.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t FlashGetSecurityState(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* securityState);
+/*!
+ * @brief Flash security bypass.
+ *
+ * This API will unsecure the device by comparing the user's provided back
+ * door key with the ones in the Flash Configuration Field. If they are
+ * matched each other, then security will be released. Otherwise, an
+ * error code will be returned.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param keyBuffer: Point to the user buffer containing the back door key.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashSecurityBypass(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* keyBuffer, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*!
+ * @brief Flash erase all Blocks.
+ *
+ * This API will erase all Flash memory, initialize the FlexRAM, verify
+ * all memory contents, and then release MCU security
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_PVIOL, FTFx_ERR_MGSTAT0, FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashEraseAllBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*!
+ * @brief Flash verify all Blocks.
+ *
+ * This function will check to see if the P-Flash and/or D-Flash, EEPROM
+ * backup area, and D-Flash IFR have been erased to the specified read
+ * margin level, if applicable, and will release security if the readout passes
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param marginLevel: Read Margin Choice as follows:
+ * marginLevel = 0x0: use the Normal read level
+ * marginLevel = 0x1: use the User read
+ * marginLevel = 0x2: use the Factory read
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_MGSTAT0, FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashVerifyAllBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash erase sector.
+ *
+ * This API will erase one or more sectors in P-Flash or D-Flash memory.
+ * This API always returns FTFx_OK if size provided by user is
+ * zero regardless of the input validation.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Address in the first sector to be erased.
+ * @param size: Size to be erased in bytes. It is used to determine
+ * number of sectors to be erased.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_MGSTAT0, FTFx_ERR_ACCERR, FTFx_ERR_PVIOL,FTFx_ERR_SIZE)
+ */
+extern uint32_t FlashEraseSector(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash verify sector.
+ *
+ * This API will check to see if a section of P-Flash or D-Flash memory
+ * is erased to the specified read margin level
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended verify operation.
+ * @param number: Number of alignment unit to be verified. Refer to
+ * corresponding reference manual to get correct
+ * information of alignment constrain.
+ * @param marginLevel: Read Margin Choice as follows:
+ * marginLevel = 0x0: use Normal read level
+ * marginLevel = 0x1: use the User read
+ * marginLevel = 0x2: use the Factory read
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_MGSTAT0, FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashVerifySection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash erase suspend.
+ *
+ * This API is used to suspend a current operation of flash erase sector command.
+ * This function must be located in RAM memory or different flash blocks which are
+ * targeted for writing to avoid RWW error
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t FlashEraseSuspend(PFLASH_SSD_CONFIG pSSDConfig);
+/*!
+ * @brief Flash erase resume.
+ *
+ * This API is used to resume a previous suspended operation of flash erase sector command
+ * This function must be located in RAM memory or different flash blocks which are targeted
+ * for writing to avoid RWW error
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t FlashEraseResume(PFLASH_SSD_CONFIG pSSDConfig);
+/*!
+ * @brief Flash read once.
+ *
+ * This API is used to read out a reserved 64 byte field located in the P-Flash IFR via given number
+ * of record. Refer to corresponding reference manual to get correct value of this number.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param recordIndex: The record index will be read. It can be from 0x0
+ * to 0x7 or from 0x0 to 0xF according to specific derivative.
+ * @param pDataArray: Pointer to the array to return the data read by the read once command.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashReadOnce(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t recordIndex,\
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash program once.
+ *
+ * This API is used to program to a reserved 64 byte field located in the
+ * P-Flash IFR via given number of record. Refer to corresponding reference manual
+ * to get correct value of this number.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param recordIndex: The record index will be read. It can be from 0x0
+ * to 0x7 or from 0x0 to 0xF according to specific derivative.
+ * @param pDataArray: Pointer to the array from which data will be
+ * taken for program once command.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR,FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashProgramOnce(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t recordIndex,\
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash read resource.
+ *
+ * This API is used to read data from special purpose memory in flash memory module
+ * including P-Flash IFR, swap IFR, D-Flash IFR space and version ID.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended read operation.
+ * @param pDataArray: Pointer to the data returned by the read resource command.
+ * @param resourceSelectCode: Read resource select code:
+ * 0 : Flash IFR
+ * 1: Version ID
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashReadResource(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t* pDataArray, \
+ uint8_t resourceSelectCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash program
+ *
+ * This API is used to program 4 consecutive bytes (for program long
+ * word command) and 8 consecutive bytes (for program phrase command) on
+ * P-flash or D-Flash block. This API always returns FTFx_OK if size
+ * provided by user is zero regardless of the input validation
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended program operation.
+ * @param size: Size in byte to be programmed
+ * @param pData: Pointer of source address from which data has to
+ * be taken for program operation.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_PVIOL, FTFx_ERR_SIZE, FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashProgram(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*!
+ * @brief Flash program check
+ *
+ * This API tests a previously programmed P-Flash or D-Flash long word
+ * to see if it reads correctly at the specified margin level. This
+ * API always returns FTFx_OK if size provided by user is zero
+ * regardless of the input validation
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended program check operation.
+ * @param size: Size in byte to check accuracy of program operation
+ * @param pExpectedData: The pointer to the expected data.
+ * @param pFailAddr: Returned the first aligned failing address.
+ * @param marginLevel: Read margin choice as follows:
+ * marginLevel = 0x1: read at User margin 1/0 level.
+ * marginLevel = 0x2: read at Factory margin 1/0 level.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashProgramCheck(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pExpectedData, \
+ uint32_t* pFailAddr, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*!
+ * @brief Calculate check sum
+ *
+ * This API will perform 32 bit sum of each byte data over specified flash
+ * memory range without carry, which provides rapid method for checking data integrity.
+ * The callback time period of this API is determined via FLASH_CALLBACK_CS macro in
+ * SSD_FTFx_Common.h which is used as a counter value for the CallBack() function calling in
+ * this API. This value can be changed as per the user requirement. User can change this value to
+ * obtain the maximum permissible callback time period.
+ * This API always returns FTFx_OK if size provided by user is zero regardless of the input
+ * validation.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address of the Flash range to be summed
+ * @param size: Size in byte of the flash range to be summed
+ * @param pSum: To return the sum value
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_RANGE)
+ */
+extern uint32_t FlashCheckSum(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint32_t* pSum);
+
+#ifndef FTFA_M
+/*!
+ * @brief Flash program section
+ *
+ * This API will program the data found in the Section Program Buffer
+ * to previously erased locations in the Flash memory. Data is preloaded into
+ * the Section Program Buffer by writing to the acceleration Ram and FlexRam
+ * while it is set to function as a RAM. The Section Program Buffer is limited
+ * to the value of FlexRam divides by a ratio. Refer to the associate reference
+ * manual to get correct value of this ratio.
+ * For derivatives including swap feature, the swap indicator address is encountered
+ * during FlashProgramSection, it is bypassed without setting FPVIOL but the content
+ * are not be programmed. In addition, the content of source data used to program to
+ * swap indicator will be re-initialized to 0xFF after completion of this command.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended program operation.
+ * @param number: Number of alignment unit to be programmed. Refer to associate
+ * reference manual to get correct value of this alignment constrain.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_PVIOL, FTFx_ERR_MGSTAT0, FTFx_ERR_RAMRDY)
+ */
+extern uint32_t FlashProgramSection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+#endif
+
+#if (!(defined(FTFA_M)) || (defined(BLOCK_COMMANDS)))
+/*!
+ * @brief Flash erase block
+ *
+ * This API will erase all addresses in an individual P-Flash or D-Flash block.
+ * For the derivatives including multiply logical P-Flash or D-Flash blocks,
+ * this API just erases a single block in a single call.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended erase operation.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_PVIOL, FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashEraseBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash verify block
+ *
+ * This API will check to see if an entire P-Flash or D-Flash block has been
+ * erased to the specified margin level
+ * For the derivatives including multiply logical P-Flash or D-Flash blocks,
+ * this API just erases a single block in a single call.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended verify operation.
+ * @param marginLevel: Read Margin Choice as follows:
+ * marginLevel = 0x0: use Normal read level
+ * marginLevel = 0x1: use the User read
+ * marginLevel = 0x2: use the Factory read
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashVerifyBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+#endif
+
+#if (DEBLOCK_SIZE != 0x0U)
+/*!
+ * @brief EERAM get protection
+ *
+ * This API retrieves which EEPROM sections of FlexRAM are protected
+ * against program and erase operations. Considering the time consumption
+ * for getting protection is very low and even can be ignored, it is not necessary
+ * to utilize the Callback function to support the time-critical events
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param protectStatus: To return the current value of the EEPROM
+ * Protection Register. Each bit is corresponding to
+ * protection status of 1/8 of the total EEPROM
+ * use. The least significant bit is corresponding to
+ * the lowest address area of EEPROM. The most
+ * significant bit is corresponding to the highest
+ * address area of EEPROM and so on. There are
+ * two possible cases as below:
+ * - 0: this area is protected.
+ * - 1: this area is unprotected.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_NOEEE)
+ */
+extern uint32_t EERAMGetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* protectStatus);
+/*!
+ * @brief EERAM set protection
+ *
+ * This API sets protection to the intended protection status for EEPROM us
+ * area of FlexRam. This is subject to a protection transition restriction.
+ * If there is any setting violation, it will return failed information and
+ * the current protection status won’t be changed.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param protectStatus: The intended protection status value should be
+ * written to the EEPROM Protection Register.
+ * Each bit is corresponding to
+ * protection status of 1/8 of the total EEPROM
+ * use. The least significant bit is corresponding to
+ * the lowest address area of EEPROM. The most
+ * significant bit is corresponding to the highest
+ * address area of EEPROM and so on. There are
+ * two possible cases as below:
+ * - 0: this area is protected.
+ * - 1: this area is unprotected.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_NOEEE,FTFx_ERR_CHANGEPROT)
+ */
+extern uint32_t EERAMSetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t protectStatus);
+/*!
+ * @brief Flash Set EEEEnable
+ *
+ * This function is used to change the function of the FlexRAM. When not
+ * partitioned for EEPROM backup, the FlexRam is typically used as traditional
+ * RAM. Otherwise, the FlexRam is typically used to store EEPROM data and user
+ * can use this API to change its functionality according to his application requirement.
+ * For example, after partitioning to have EEPROM backup, FlexRAM is used for EEPROM
+ * use accordingly. And this API will be used to set FlexRAM is available for
+ * traditional RAM for FlashProgramSection() use.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param EEEEnable: FlexRam function control code. It can be:
+ * - 0xFF: make FlexRam available for RAM.
+ * - 0x00: make FlexRam available for EEPROM.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR)
+ */
+extern uint32_t SetEEEEnable(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEEnable,pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief EEPROM Emulator Write
+ *
+ * This API is used to write data to FlexRAM section which is artitioned
+ * as EEPROM use for EEPROM operation. Once data has been written to EEPROM
+ * use section of FlexRAM, the EEPROM file system will create new data record
+ * in EEPROM back-up area of FlexNVM in round-robin fashion.
+ * There is no alignment constraint for destination and size parameters
+ * provided by user. However, according to user’s input provided, this
+ * API will set priority to write to FlexRAM with following rules:
+ * 32-bit writing will be invoked if destination is 32 bit aligned and size
+ * is not less than 32 bits.
+ * 16-bit writing will be invoked if destination is 16 bit aligned and size
+ * is not less than 16 bits.
+ * 8-bit writing will be invoked if destination is 8 bit aligned and size is not less than 8 bits.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended write operation.
+ * @param size: Size in byte to be written.
+ * @param pData: Pointer to source address from which data
+ * has to be taken for writing operation.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_RANGE, FTFx_ERR_NOEEE, FTFx_ERR_PVIOL)
+ */
+extern uint32_t EEEWrite(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData);
+/*!
+ * @brief Flash D/E-Flash Partition.
+ *
+ * This API prepares the FlexNVM block for use as D-Flash, EEPROM backup or a combination
+ * of both and initializes the FlexRAM
+ *
+ * The single partition choice should be used through entire life time of a given
+ * application to guarantee the flash endurance and data retention of flash module.
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param EEEDataSizeCode EEPROM Data Size Code
+ * @param DEPartitionCode FlexNVM Partition Code
+ * @param pFlashCommandSequence Pointer to the flash command sequence function.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_ACCERR, FTFx_ERR_MGSTAT0)
+ */
+
+extern uint32_t DEFlashPartition(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEDataSizeCode, \
+ uint8_t DEPartitionCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief D-Flash get protection.
+ *
+ * This API retrieves current P-Flash protection status. Considering the time consumption
+ * for getting protection is very low and even can be ignored, it is not necessary to utilize
+ * the Callback function to support the time-critical events
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param protectStatus To return the current value of the D-Flash Protection
+ * Register. Each bit is corresponding to protection status
+ * of 1/8 of the total D-Flash. The least significant bit is
+ * corresponding to the lowest address area of D-Flash. The
+ * most significant bit is corresponding to the highest address
+ * area of D-Flash and so on. There are two possible cases as below:
+ * - 0 : this area is protected.
+ * - 1 : this area is unprotected.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_EFLASHONLY)
+ */
+extern uint32_t DFlashGetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* protectStatus);
+
+/*!
+ * @brief D-Flash set protection.
+ *
+ * This API sets the D-Flash protection to the intended protection status. Setting D-Flash
+ * protection status is subject to a protection transition restriction. If there is any setting
+ * violation, it will return failed information and the current protection status won’t be changed.
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param protectStatus The expected protect status user wants to set to D-Flash Protection
+ * Register. Each bit is corresponding to protection status
+ * of 1/8 of the total D-Flash. The least significant bit is
+ * corresponding to the lowest address area of D-Flash. The
+ * most significant bit is corresponding to the highest address
+ * area of D-Flash and so on. There are two possible cases as below:
+ * - 0 : this area is protected.
+ * - 1 : this area is unprotected.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_EFLASHONLY,FTFx_ERR_CHANGEPROT)
+ */
+extern uint32_t DFlashSetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t protectStatus);
+#endif /* End of DEBLOCK_SIZE */
+
+#ifdef SWAP_M
+/*!
+ * @brief swap between the two half of total logical P-Flash memory blocks within the memory map
+ *
+ * The swap API provides to user with an ability to interfere in a swap progress by letting the
+ * user code knows about the swap state in each phase of the process. This is done via pSwapCallBack()
+ * parameter. If user wants to stop at each intermediate swap state, just needs to set return value of
+ * this callback function to FALSE. If user wants to complete swap process within a single call, just
+ * needs to set return value of this function to TRUE.
+ *
+ * It is very important that user needs to erase the non-active swap indicator in somewhere of his
+ * application code or in within this swap call back function when swap system is in UPDATE state.
+ *
+ * In addition, if user does not want to use the swap call back parameter, just pass NULL_SWAP_CALLBACK
+ * as a null pointer. In a such situation, the PFlashSwap() will operate as in case setting return
+ * value of pSwapCallBack to TRUE and user does not need to care about erasing the non-active swap
+ * indicator when swap system is in UPDATE state.
+ *
+ * Below is an example to show how to implement a swap callback:
+ * @code
+ * bool PFlashSwapCallback(uint8_t currentSwapMode)
+ * {
+ * switch (currentSwapMode)
+ * {
+ * case FTFx_SWAP_UNINI:
+ * // Put your application-specific code here
+ * break;
+ * case FTFx_SWAP_READY:
+ * // Put your application-specific code here
+ * break;
+ * case FTFx_SWAP_UPDATE:
+ * // Put your application-specific code here (example: erase non-active swap indicator here)
+ * break;
+ * case FTFx_SWAP_UPDATE_ERASED:
+ * // Put your application-specific code here (example: erase non-active swap indicator here)
+ * break;
+ * case FTFx_SWAP_COMPLETE:
+ * // Put your application-specific code here
+ * break;
+ * default:
+ * break;
+ * }
+ * return TRUE; // Return FALSE to stop at intermediate swap state
+ *}
+ * @endcode
+ * The swap indicator provided by user must be within the lower half of P-Flash block but not in
+ * flash configuration area. If P-Flash block has two logical blocks, then swap indicator must be
+ * in P-Flash block 0. If P-Flash block has four logical blocks, then swap indicator can be in block
+ * 0 or block 1. Of course, it must not be in flash configuration field.
+ * User must use the same swap indicator for all swap control code except report swap status once
+ * swap system has been initialized. To refresh swap system to un-initialization state, just needs
+ * to use FlashEraseAllBlock() to clean up swap environment.
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param addr Address of swap indicator.
+ * @param pSwapCallback Callback to do specific task while the swapping is being performed
+ * @param pFlashCommandSequence Pointer to the flash command sequence function.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_ACCERR,FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t PFlashSwap(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t addr, \
+ PFLASH_SWAP_CALLBACK pSwapCallback, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief implements swap control command corresponding with swap control code provided via swapcmd parameter
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param addr Address of swap indicator.
+ * @param swapcmd Swap Control Code:
+ * 0x01 - Initialize Swap System
+ * 0x02 - Set Swap in Update State
+ * 0x04 - Set Swap in Complete Stat
+ * 0x08 - Report Swap Status
+ * @param pCurrentSwapMode Current Swap Mode:
+ * 0x00 - Uninitialized
+ * 0x01 - Ready
+ * 0x02 - Update
+ * 0x03 - Update-Erased
+ * 0x04 - Complete
+ * @param pCurrentSwapBlockStatus Current Swap Block Status indicates which program flash block
+ * is currently located at relative flash address 0x0_0000
+ * 0x00 - Program flash block 0
+ * 0x01 - Program flash block 1
+ * @param pNextSwapBlockStatus Next Swap Block Status indicates which program flash block
+ * will be located at relative flash address 0x0_0000 after the next reset.
+ * 0x00 - Program flash block 0
+ * 0x01 - Program flash block 1
+ * @param pFlashCommandSequence Pointer to the flash command sequence function.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_ACCERR,FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t PFlashSwapCtl(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t addr, \
+ uint8_t swapcmd, \
+ uint8_t* pCurrentSwapMode,\
+ uint8_t* pCurrentSwapBlockStatus, \
+ uint8_t* pNextSwapBlockStatus, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+#endif /* End of SWAP_M */
+/*@}*/
+
+/*! @}*/
+#endif /* _SSD_FTFx_INTERNAL_H_ */
diff --git a/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx_Common.h b/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx_Common.h
new file mode 100644
index 0000000..2d7ab91
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx_Common.h
@@ -0,0 +1,424 @@
+/****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SSD_FTFx.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.20.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update to support K20-512, K20-1M, L4K, LOPA,
+ L2KM and MCF51JG derivatives
+ Remove EERAMBlockSize field in ssdConfig
+0.1.1 06.10.2013 FPT Team Add to include "user_config.h" file
+0.1.2 06.11.2013 FPT Team Add derivative FTFx_JX_32K_32K_2K_1K_1K
+0.1.3 06.20.2013 FPT Team Add derivative FTFx_KX_256K_0K_4K_2K_0K
+ Remove derivative FTFx_KX_512K_0K_0K_2K_0K
+ Change derivative name as below:
+ - from FTFx_KX_32K_0K_0K_1K_0K to FTFx_KX_32K_0K_2K_1K_0K
+ - from FTFx_KX_64K_0K_0K_1K_0K to FTFx_KX_64K_0K_2K_1K_0K
+ - from FTFx_KX_128K_0K_0K_1K_0K to FTFx_KX_128K_0K_2K_1K_0K
+ Remove compiler definition CW and IAR
+ Add derivative for LKM family: FTFx_MX_64K_0K_0K_1K_0K
+ and FTFx_MX_128K_0K_0K_1K_0K
+ Remove FTFx_FX_256K_32K_2K_1K_1K
+ Change FTFx_JX_xxx to FTFx_CX_xxx for coldfire core.
+1.0.0 12.25.2013 FPT Team Add derivative FTFx_KX_512K_0K_0K_2K_0K
+ Add derivative FTFx_KX_256K_0K_0K_2K_0K
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add derivative FTFx_KX_128K_0K_0K_2K_0K
+1.0.3 10.10.2014 FPT Team Add to support Doxygen; KV30, K60_2M and Torq Silver
+*************************************************************************/
+#ifndef _SSD_FTFx_COMMON_H_
+#define _SSD_FTFx_COMMON_H_
+
+#include "SSD_Types.h"
+
+/*------------------------- Configuration Macros -----------------------*/
+/* Define derivatives with rule: FTFx_AA_BB_CC_DD_EE_FF
+AA: MCU type
+BB: P-Flash block size
+CC: FlexNVM block size
+DD: FlexRAM/AccRam size
+EE: P-Flash sector size
+FF: D-Flash sector size */
+
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+/*!
+ * @name Supported flash configuration
+ * @{
+ */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 256K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 2K */
+#define FTFx_KX_256K_256K_4K_2K_2K 1 /* Kinetis - K40, K60 ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 512K, FlexNVM block size: 0K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_512K_0K_4K_2K_0K 2 /* Kinetis - K20, K40, K60 ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 512K, FlexNVM block size: 512K, FlexRAM/AccRam size: 16K, P-Flash sector size: 4K, FlexNVM sector size: 4K */
+#define FTFx_KX_512K_512K_16K_4K_4K 3 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 1024K, FlexNVM block size: 0K, FlexRAM/AccRam size: 16K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_1024K_0K_16K_4K_0K 4 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 32K, FlexNVM block size: 0K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_KX_32K_0K_2K_1K_0K 5 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 32K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_KX_32K_32K_2K_1K_1K 6 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_KX_64K_0K_2K_1K_0K 7 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_KX_64K_32K_2K_1K_1K 8 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_KX_128K_0K_2K_1K_0K 9 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size:128K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_KX_128K_32K_2K_1K_1K 10 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_KX_64K_32K_2K_2K_1K 11 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_KX_128K_32K_2K_2K_1K 12 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_KX_256K_32K_2K_2K_1K 13 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 1024K, FlexNVM block size: 0K, FlexRAM/AccRam size: 4K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_1024K_0K_4K_4K_0K 14 /* Kinetis - ARM Cortex M4 core - K20 1M*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 512K, FlexNVM block size: 128K, FlexRAM/AccRam size: 4K, P-Flash sector size: 4K, FlexNVM sector size: 4K */
+#define FTFx_KX_512K_128K_4K_4K_4K 15 /* Kinetis - ARM Cortex M4 core - K20 1M - 512*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 64K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 2K */
+#define FTFx_KX_256K_64K_4K_2K_2K 16 /* Kinetis - ARM Cortex M4 core - K20 256K*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 64K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 2K */
+#define FTFx_KX_128K_64K_4K_2K_2K 17 /* Kinetis - ARM Cortex M4 core - K20 128K*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 0K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_256K_0K_4K_2K_0K 18 /* Kinetis - K60 ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 128K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 2K */
+#define FTFx_KX_128K_128K_4K_2K_2K 19 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Nevis2, P-Flash block size: 256K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_NX_256K_32K_2K_2K_1K 20 /* Nevis2 - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Nevis2, P-Flash block size: 128K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_NX_128K_32K_2K_2K_1K 21 /* Nevis2 - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Nevis2, P-Flash block size: 96K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_NX_96K_32K_2K_2K_1K 22 /* Nevis2 - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Nevis2, P-Flash block size: 64K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_NX_64K_32K_2K_2K_1K 23 /* Nevis2 - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_128K_0K_0K_1K_0K 24 /* L2K - ARM Cortex M0 core */ /* L2KM, L4K*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_64K_0K_0K_1K_0K 25 /* L2K - ARM Cortex M0 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 32K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_32K_0K_0K_1K_0K 26 /* L2K & L1PT - ARM Cortex M0 core */ /* LOPA */
+/*! @brief MCU type: Kinetis, P-Flash block size: 16K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_16K_0K_0K_1K_0K 27 /* L1PT - ARM Cortex M0 core */ /* LOPA */
+/*! @brief MCU type: Kinetis, P-Flash block size: 8K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_8K_0K_0K_1K_0K 28 /* L1PT - ARM Cortex M0 core */ /* LOPA */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_256K_0K_0K_1K_0K 29 /* L4K - ARM Cortex M0 core */
+/*! @brief MCU type: Anguilla Silever, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_AX_64K_0K_0K_1K_0K 30 /* Anguilla_Silver - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Anguilla Silever, P-Flash block size: 48K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_AX_48K_0K_0K_1K_0K 31 /* Anguilla_Silver - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Anguilla Silever, P-Flash block size: 62K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_AX_32K_0K_0K_1K_0K 32 /* Anguilla_Silver - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Anguilla Silever, P-Flash block size: 16K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_AX_16K_0K_0K_1K_0K 33 /* Anguilla_Silver - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Coldfire, P-Flash block size: 128K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_CX_128K_32K_2K_1K_1K 34 /* ColdFire core, MCF51JF/JU 128K */
+/*! @brief MCU type: Coldfire, P-Flash block size: 64K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_CX_64K_32K_2K_1K_1K 35 /* ColdFire core, MCF51JF/JU 64K */
+/*! @brief MCU type: Coldfire, P-Flash block size: 32K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_CX_32K_32K_2K_1K_1K 36 /* ColdFire core, MCF51JF/JU 32K */
+/*! @brief MCU type: Coldfire, P-Flash block size: 256K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_CX_256K_32K_2K_1K_1K 37 /* ColdFire core, MCF51JG256 , MCF51FD256*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_MX_64K_0K_0K_1K_0K 38 /* LKM34 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_MX_128K_0K_0K_1K_0K 39 /* LKM34 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 512K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_512K_0K_0K_2K_0K 40 /* Senna K22FN512 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_256K_0K_0K_2K_0K 41 /* Senna K22FN256 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_128K_0K_0K_2K_0K 42 /* KV30 MKV30F12810/ K02 MK02FN12810/K22FN128 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_64K_0K_0K_2K_0K 43 /* KV30 MKV30F6410/ K02 MK02FN6410 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_256K_0K_0K_4K_0K 44 /* Torq Silver KV4F256 and K24s MK24F25612 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_128K_0K_0K_4K_0K 45 /* Torq Silver KV4F128 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_64K_0K_0K_4K_0K 46 /* Torq Silver KV4F64 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 2048K, FlexNVM block size: 0K, FlexRAM/AccRam size: 4K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_2048K_0K_4K_4K_0K 47 /* Kinetis - K60_2M ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 1024K, FlexNVM block size: 256K, FlexRAM/AccRam size: 4K, P-Flash sector size: 4K, FlexNVM sector size: 4K */
+#define FTFx_KX_1024K_256K_4K_4K_4K 48 /* Kinetis - ARM Cortex M4 core - K65/K66 */
+/*@}*/
+
+
+
+
+/* Endianness */
+/*!
+ * @name Endianness definition
+ * @{
+ */
+/*! @brief Big Endian */
+#define BIG_ENDIAN 0
+/*! @brief Little Endian */
+#define LITTLE_ENDIAN 1
+/*@}*/
+/*!
+ * @name CPU core types
+ * @{
+ */
+/*! @brief ColdFire core */
+#define COLDFIRE 0
+/*! @brief ARM Cortex M core */
+#define ARM_CORTEX_M 1
+/*! @brief DSC_56800EX core */
+#define DSC_56800EX 2
+/*@}*/
+/*!
+ * @name Size macro
+ * @{
+ */
+/*! @brief Word size */
+#define FTFx_WORD_SIZE 0x0002U /* 2 bytes */
+/*! @brief Longword size */
+#define FTFx_LONGWORD_SIZE 0x0004U /* 4 bytes */
+/*! @brief Phrase size */
+#define FTFx_PHRASE_SIZE 0x0008U /* 8 bytes */
+/*! @brief Double-phrase size */
+#define FTFx_DPHRASE_SIZE 0x0010U /* 16 bytes */
+
+/*@}*/
+
+/*! @}*/
+/* Flash security status */
+#define FLASH_SECURITY_STATE_KEYEN 0x80U
+#define FLASH_SECURITY_STATE_UNSECURED 0x02U
+
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*------------ Return Code Definition for FTFx SSD ---------------------*/
+/*!
+ * @name Return Code Definition for FTFx SSD
+ * @{
+ */
+/*! @brief Function executes successfully */
+#define FTFx_OK 0x0000U
+/*!@brief MGSTAT0 bit is set in the FSTAT register
+*
+* Possible causes:
+*
+* MGSTAT0 bit in FSTAT register is set. Refer to corresponding command description
+* of each API on reference manual to get detail reasons
+*
+* Solution:
+*
+* Hardware error
+*
+*/
+#define FTFx_ERR_MGSTAT0 0x0001U
+/*! @brief Protection violation is set in FSTAT register
+*
+* Possible causes:
+*
+* FPVIOL bit in FSTAT register is set. Refer to corresponding command description
+* of each API on reference manual to get detail reasons
+*
+* Solution:
+*
+* The flash location targeted to program/erase operation must be unprotected. Swap
+* indicator must not be programed/erased except in Update or Update-Erase state.
+*
+*/
+#define FTFx_ERR_PVIOL 0x0010U
+/*! @brief Access error is set in the FSTAT register
+*
+* Possible causes:
+*
+* ACCERR bit in FSTAT register is set. Refer to corresponding command description
+* of each API on reference manual to get detail reasons.
+*
+* Solution:
+*
+* Provide valid input parameters for each API according to specific flash module.
+*
+*/
+#define FTFx_ERR_ACCERR 0x0020U
+/*! @brief Can not change protection status
+*
+* Possible causes:
+*
+* Violate protection transition
+*
+* Solution:
+*
+* In NVM normal mode, protection size cannot be decreased. So, only increasing
+* protection size is permitted if the device is operating in this mode.
+*
+*/
+#define FTFx_ERR_CHANGEPROT 0x0100U
+/*! @brief FlexRAM is not set for EEPROM use
+*
+* Possible causes:
+*
+* User accesses to EEPROM operation but there is no EEPROM backup enabled.
+*
+* Solution:
+*
+* Need to enable EEPROM by partitioning FlexNVM to have EEPROM backup and/or
+* enable it by SetEEEnable API.
+*
+*/
+#define FTFx_ERR_NOEEE 0x0200U
+/*! @brief FlexNVM is set for full EEPROM backup
+*
+* Possible causes:
+*
+* User accesses to D-Flash operation but there is no D-Flash on FlexNVM.
+*
+* Solution:
+*
+* Need to partition FlexNVM to have D-Flash.
+*
+*/
+#define FTFx_ERR_EFLASHONLY 0x0400U
+/*! @brief Programming acceleration RAM is not available
+*
+* Possible causes:
+*
+* User invokes flash program section command but FlexRam is being set for EEPROM emulation.
+*
+* Solution:
+*
+* Need to set FlexRam as traditional Ram by SetEEEnable API.
+*
+*/
+#define FTFx_ERR_RAMRDY 0x0800U
+/*! @brief Address is out of the valid range
+*
+* Possible causes:
+*
+* The size or destination provided by user makes start address or end address
+* out of valid range.
+*
+* Solution:
+*
+* Make sure the destination and (destination + size) within valid address range.
+*
+*/
+#define FTFx_ERR_RANGE 0x1000U
+/*! @brief Misaligned size
+*
+* Possible causes:
+*
+* The size provided by user is misaligned.
+*
+* Solution:
+*
+* Size must be an aligned value according to specific constrain of each API.
+*
+*/
+#define FTFx_ERR_SIZE 0x2000U
+/*@}*/
+
+/*!
+ * @name Flash security status
+ * @{
+ */
+/*! @brief Flash currently not in secure state */
+#define FLASH_NOT_SECURE 0x01U
+/*! @brief Flash is secured and backdoor key access enabled */
+#define FLASH_SECURE_BACKDOOR_ENABLED 0x02U
+/*! @brief Flash is secured and backdoor key access disabled */
+#define FLASH_SECURE_BACKDOOR_DISABLED 0x04U
+/*@}*/
+
+/*! @}*/
+/*-------------- Read/Write/Set/Clear Operation Macros -----------------*/
+#define REG_BIT_SET(address, mask) (*(vuint8_t*)(address) |= (mask))
+#define REG_BIT_CLEAR(address, mask) (*(vuint8_t*)(address) &= ~(mask))
+#define REG_BIT_GET(address, mask) (*(vuint8_t *)(address) & (uint8_t)(mask))
+#define REG_WRITE(address, value) (*(vuint8_t*)(address) = (value))
+#define REG_READ(address) ((uint8_t)(*(vuint8_t*)(address)))
+#define REG_WRITE32(address, value) (*(vuint32_t*)(address) = (value))
+#define REG_READ32(address) ((uint32_t)(*(vuint32_t*)(address)))
+
+#define WRITE8(address, value) (*(vuint8_t*)(address) = (value))
+#define READ8(address) ((uint8_t)(*(vuint8_t*)(address)))
+#define SET8(address, value) (*(vuint8_t*)(address) |= (value))
+#define CLEAR8(address, value) (*(vuint8_t*)(address) &= ~(value))
+#define TEST8(address, value) (*(vuint8_t*)(address) & (value))
+
+#define WRITE16(address, value) (*(vuint16_t*)(address) = (value))
+#define READ16(address) ((uint16_t)(*(vuint16_t*)(address)))
+#define SET16(address, value) (*(vuint16_t*)(address) |= (value))
+#define CLEAR16(address, value) (*(vuint16_t*)(address) &= ~(value))
+#define TEST16(address, value) (*(vuint16_t*)(address) & (value))
+
+#define WRITE32(address, value) (*(vuint32_t*)(address) = (value))
+#define READ32(address) ((uint32_t)(*(vuint32_t*)(address)))
+#define SET32(address, value) (*(vuint32_t*)(address) |= (value))
+#define CLEAR32(address, value) (*(vuint32_t*)(address) &= ~(value))
+#define TEST32(address, value) (*(vuint32_t*)(address) & (value))
+
+#define GET_BIT_0_7(value) ((uint8_t)((value) & 0xFFU))
+#define GET_BIT_8_15(value) ((uint8_t)(((value)>>8) & 0xFFU))
+#define GET_BIT_16_23(value) ((uint8_t)(((value)>>16) & 0xFFU))
+#define GET_BIT_24_31(value) ((uint8_t)((value)>>24))
+
+/*--------------------- CallBack function period -----------------------*/
+#ifndef FLASH_CALLBACK_CS
+#define FLASH_CALLBACK_CS 0x0AU /* Check Sum */
+#endif
+
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+/*--------------------Null Callback function definition ----------------*/
+/*!
+ * @name Null Callback function definition
+ * @{
+ */
+/*! @brief Null callback */
+#define NULL_CALLBACK ((PCALLBACK)0xFFFFFFFF)
+/*! @brief Null swap callback */
+#define NULL_SWAP_CALLBACK ((PFLASH_SWAP_CALLBACK)0xFFFFFFFF)
+/*@}*/
+
+/*! @}*/
+#endif /* _SSD_FTFx_COMMON_H_ */
+
diff --git a/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx_Internal.h b/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx_Internal.h
new file mode 100644
index 0000000..5f4fbf5
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/include/SSD_FTFx_Internal.h
@@ -0,0 +1,206 @@
+/****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SSD_FTFx.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+0.1.0 06.11.2010 FPT Team Finalize to 0.1.0
+0.1.1 08.16.2010 FPT Team Update some macros for
+ FTFx_KX_256K_256K_4K_2K_2K derivative
+0.1.2 08.26.2010 FPT Team Removed EEEBlockBase element in
+ _ssd_config structure,
+0.1.3 09.16.2010 FPT Team Updated some macros for
+ FTFx_KX_256K_256K_4K_2K_2K derivative
+0.2.0 09.27.2010 FPT Team Removed some macros that is not
+ used.
+0.2.1 01.28.2011 FPT Team Updated to support
+ FTFx_KX_512K_0K_0K_2K_0K,
+ FTFx_JX_128K_32K_2K_1K_1K,
+ and FTFx_FX_256K_32K_2K_1K_1K
+ derivatives.
+0.2.2 04.18.2011 FPT Team Add Swap state definitions of
+ FTFx_PFLASH_SWAP.
+0.2.2 09.15.2011 FPT Team Add FlashProgramPhrase
+ Add macros for K70
+ Remove unused macros
+0.2.3 11.15.2011 FPT Team Updated some macros for
+ FTFx_KX_1024K_0K_16K_4K_0K derivative.
+0.2.4 12.23.2011 FPT Team Update to support more Kinetis derivatives.
+0.2.5 04.26.2012 FPT Team Update to support swap in FTFx_KX_512K_0K_0K_2K_0K derivative
+ Add definition of NULL_SWAP_CALLBACK to
+ fix incompatible function type of null pointer bug in IAR compiler
+0.3.1 05.16.2012 FPT Team Update to support
+ FTFx_NX_256K_32K_2K_2K_1K
+ FTFx_NX_128K_32K_2K_2K_1K
+ FTFx_NX_96K_32K_2K_2K_1K
+ FTFx_NX_64K_32K_2K_2K_1K
+ derivatives
+ Change prototype of FlashReadOnce and FlashProgramOnce functions
+0.3.2 06.20.2012 FPT Team Update to support more L2K and L1PT derivatives.
+ Change format of SSD_FTFx.h
+0.3.3 08.10.2012 FPT Team Update to support Anguilla Silver derivatives
+0.3.4 03.16.2013 FPT Team Update to support K20-512, K20-1M, L4K, LOPA,
+ L2KM and MCF51JG derivatives
+ Remove user's defined macros to other file.
+ Add compiler error display
+0.3.5 06.10.2013 FPT Team Add PGM2DATA, DATA2PGM macros to support copying FlashLaunchCommand
+ RAM on DSC devices
+ Update derivative name according to the change on SSD_FTFx_Common.h
+ Change the prefix of common header file name as below:
+ - from L (L family) to K (Kinetis)
+ - from F (FD256) to C (Coldfire)
+ - from J (JF/JU) to C (Coldfire)
+ - from N (Nevis) to D (DSC)
+ - from A (AnguilaSiver) to D (DSC)
+1.0.0 12.25.2013 FPT Team Swap content of SSD_FTFx_Internal.h and SSD_FTFx.h to optimize include structure in c source file
+ Update to support Senna derivatives
+ Update to Enter debug mode use macro
+ Add definition READ16_ADV(addr) and READ32_ADV(addr)
+ to support Anguilla Silver and Nevis2 in EEEWrite function
+1.0.2 08.04.2014 FPT Team Update to follow SDK
+ convention(MISRA-C)
+ Delete define macros READ16_ADV and READ32_ADV
+ Change ARM_CM0PLUS and ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support KV30, K60_2M and Torq Silver
+*************************************************************************/
+#ifndef _SSD_FTFx_H_
+#define _SSD_FTFx_H_
+
+#include "SSD_FTFx_Common.h"
+#include "user_cfg.h"
+
+
+#ifndef FLASH_DERIVATIVE
+#error"User needs to define FLASH_DERIVATIVE macro in user_cfg.h file"
+#endif
+
+#ifndef C90TFS_ENABLE_DEBUG
+ #define C90TFS_ENABLE_DEBUG 0
+#endif
+/* Select file .h for each derivatives */
+#if (FTFx_KX_256K_256K_4K_2K_2K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_256K_256K_4K_2K_2K.h"
+#elif (FTFx_KX_128K_128K_4K_2K_2K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_128K_128K_4K_2K_2K.h"
+#elif ((FTFx_KX_512K_0K_4K_2K_0K == FLASH_DERIVATIVE) || (FTFx_KX_256K_0K_4K_2K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(512_256)K_0K_4K_2K_0K.h"
+#elif (FTFx_CX_256K_32K_2K_1K_1K == FLASH_DERIVATIVE)
+ #include "FTFx_CX_256K_32K_2K_1K_1K.h"
+#elif ((FTFx_CX_128K_32K_2K_1K_1K == FLASH_DERIVATIVE) || (FTFx_CX_64K_32K_2K_1K_1K == FLASH_DERIVATIVE)\
+ || (FTFx_CX_32K_32K_2K_1K_1K == FLASH_DERIVATIVE))
+ #include "FTFx_CX_(128_64_32)K_32K_2K_1K_1K.h"
+#elif (FTFx_KX_512K_512K_16K_4K_4K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_512K_512K_16K_4K_4K.h"
+#elif ((FTFx_KX_1024K_0K_16K_4K_0K == FLASH_DERIVATIVE) || (FTFx_KX_1024K_0K_4K_4K_0K == FLASH_DERIVATIVE)\
+ || (FTFx_KX_2048K_0K_4K_4K_0K))
+ #include "FTFx_KX_(2048_1024)K_0K_(16_4)K_4K_0K.h"
+#elif ((FTFx_KX_128K_0K_2K_1K_0K == FLASH_DERIVATIVE)||(FTFx_KX_64K_0K_2K_1K_0K == FLASH_DERIVATIVE)\
+ ||(FTFx_KX_32K_0K_2K_1K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(128_64_32)K_0K_2K_1K_0K.h"
+#elif ((FTFx_KX_128K_32K_2K_1K_1K == FLASH_DERIVATIVE)||(FTFx_KX_64K_32K_2K_1K_1K == FLASH_DERIVATIVE)\
+ ||(FTFx_KX_32K_32K_2K_1K_1K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(128_64_32)K_32K_2K_1K_1K.h"
+#elif ((FTFx_KX_256K_32K_2K_2K_1K == FLASH_DERIVATIVE)||(FTFx_KX_128K_32K_2K_2K_1K == FLASH_DERIVATIVE)\
+ ||(FTFx_KX_64K_32K_2K_2K_1K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h"
+#elif ((FTFx_NX_256K_32K_2K_2K_1K == FLASH_DERIVATIVE)||(FTFx_NX_128K_32K_2K_2K_1K == FLASH_DERIVATIVE)\
+ ||(FTFx_NX_96K_32K_2K_2K_1K == FLASH_DERIVATIVE)||(FTFx_NX_64K_32K_2K_2K_1K == FLASH_DERIVATIVE))
+ #include "FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K.h"
+#elif ((FTFx_LX_128K_0K_0K_1K_0K == FLASH_DERIVATIVE)||(FTFx_LX_64K_0K_0K_1K_0K == FLASH_DERIVATIVE)\
+ ||(FTFx_LX_32K_0K_0K_1K_0K == FLASH_DERIVATIVE)||(FTFx_LX_16K_0K_0K_1K_0K == FLASH_DERIVATIVE)\
+ ||(FTFx_LX_8K_0K_0K_1K_0K == FLASH_DERIVATIVE) || (FTFx_LX_256K_0K_0K_1K_0K == FLASH_DERIVATIVE)\
+ || (FTFx_MX_64K_0K_0K_1K_0K == FLASH_DERIVATIVE) || (FTFx_MX_128K_0K_0K_1K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h"
+#elif ((FTFx_AX_64K_0K_0K_1K_0K == FLASH_DERIVATIVE)||(FTFx_AX_48K_0K_0K_1K_0K == FLASH_DERIVATIVE)\
+ ||(FTFx_AX_32K_0K_0K_1K_0K == FLASH_DERIVATIVE)||(FTFx_AX_16K_0K_0K_1K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K.h"
+#elif (FTFx_KX_512K_128K_4K_4K_4K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_512K_128K_4K_4K_4K.h"
+#elif ((FTFx_KX_256K_64K_4K_2K_2K == FLASH_DERIVATIVE) || (FTFx_KX_128K_64K_4K_2K_2K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(256_128)K_64K_4K_2K_2K.h"
+#elif ((FTFx_KX_512K_0K_0K_2K_0K == FLASH_DERIVATIVE) || (FTFx_KX_256K_0K_0K_2K_0K == FLASH_DERIVATIVE)\
+ || (FTFx_KX_128K_0K_0K_2K_0K == FLASH_DERIVATIVE) || (FTFx_KX_64K_0K_0K_2K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(512_256_128_64)K_0K_0K_2K_0K.h"
+#elif ((FTFx_KX_256K_0K_0K_4K_0K == FLASH_DERIVATIVE) || (FTFx_KX_128K_0K_0K_4K_0K == FLASH_DERIVATIVE) || (FTFx_KX_64K_0K_0K_4K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(256_128_64)K_0K_0K_4K_0K.h"
+#elif (FTFx_KX_1024K_256K_4K_4K_4K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_1024K_256K_4K_4K_4K.h"
+#endif
+
+/* determine offset value for copy FlashLaunchCommand */
+#if ((CPU_CORE == COLDFIRE)||(CPU_CORE == DSC_56800EX))
+#define LAUNCH_COMMAND_OFFSET 0x0U /* coldfile core dont need to shift address */
+#else
+#define LAUNCH_COMMAND_OFFSET 0x01U /* other cores need to shift address by 1 before copying */
+#endif
+
+/* This macros is used for copy command sequence feature*/
+#if (CPU_CORE == DSC_56800EX)
+ #define PGM2DATA(x) ((x>PROGRAM_RAM_SPACE_BASE)?(x-PROGRAM_RAM_SPACE_BASE + DATA_SPACE_BASE):(x + DATA_SPACE_BASE))
+ #define DATA2PGM(x) (x+PROGRAM_RAM_SPACE_BASE)
+#else
+ #define PGM2DATA(x) (x)
+ #define DATA2PGM(x) (x)
+#endif
+
+/* Enter debug mode macro */
+#if (CPU_CORE == ARM_CORTEX_M)
+ /* CW10, IAR */
+ #if ((defined __ICCARM__) || (defined __GNUC__))
+ #define ENTER_DEBUG_MODE asm ("BKPT #0" )
+ /* KIEL */
+ #elif (defined __ARMCC_VERSION)
+ #define ENTER_DEBUG_MODE __asm ("BKPT #0" )
+ #endif
+#endif
+#if (CPU_CORE == DSC_56800EX)
+ #define ENTER_DEBUG_MODE asm ( debughlt)
+#endif
+#if (CPU_CORE == COLDFIRE)
+ #define ENTER_DEBUG_MODE asm ( HALT )
+#endif
+
+#if ((defined __GNUC__) && (CPU_CORE == ARM_CORTEX_M))
+ #define SIZE_OPTIMIZATION __attribute__((optimize("O4")))
+#else
+ #define SIZE_OPTIMIZATION
+#endif
+
+#endif /* _SSD_FTFx_H_ */
+
+
diff --git a/plan_manage_main/src/drivers/FTFx/include/SSD_Types.h b/plan_manage_main/src/drivers/FTFx/include/SSD_Types.h
new file mode 100644
index 0000000..0b9fa9e
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/include/SSD_Types.h
@@ -0,0 +1,276 @@
+/****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SSD_FTFx.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *****************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Finalize to 1.0.0
+1.0.2 08.04.2014 FPT Team Update to follow SDK
+ convention(MISRA-C)
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+****************************************************************************/
+
+#ifndef _SSD_TYPES_H_
+#define _SSD_TYPES_H_
+
+#ifndef FALSE
+#define FALSE 0x0U
+#endif
+
+#ifndef TRUE
+#define TRUE 0x01U
+#endif
+
+#include
+typedef unsigned char bool;
+
+typedef volatile signed char vint8_t;
+typedef volatile unsigned char vuint8_t;
+typedef volatile signed short vint16_t;
+typedef volatile unsigned short vuint16_t;
+typedef volatile signed long vint32_t;
+typedef volatile unsigned long vuint32_t;
+
+#if (defined __MWERKS__)
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+typedef signed short int16_t;
+typedef unsigned short uint16_t;
+typedef signed long int32_t;
+typedef unsigned long uint32_t;
+#endif
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+
+/*!
+ * @name Type definition for flash driver
+ * @{
+ */
+/*-------------------- Callback function prototype ---------------------*/
+/*! @brief Call back function pointer data type */
+typedef void (* PCALLBACK)(void);
+/*! @brief Swap call back function pointer data type */
+typedef bool (* PFLASH_SWAP_CALLBACK)(uint8_t function);
+
+
+/*---------------- Flash SSD Configuration Structure -------------------*/
+/*! @brief Flash SSD Configuration Structure
+*
+* The structure includes the static parameters for C90TFS/FTFx which are
+* device-dependent. The user should correctly initialize the fields including
+* ftfxRegBase, PFlashBlockBase, PFlashBlockSize, DFlashBlockBase, EERAMBlockBase,
+* DebugEnable and CallBack before passing the structure to SSD functions.
+* The rest of parameters such as DFlashBlockSize, and EEEBlockSize will be
+* initialized in FlashInit() automatically. The pointer to CallBack has to be
+* initialized either for null callback or a valid call back function.
+*
+*/
+typedef struct _ssd_config
+{
+ uint32_t ftfxRegBase; /*!< The register base address of C90TFS/FTFx */
+ uint32_t PFlashBlockBase; /*!< The base address of P-Flash memory */
+ uint32_t PFlashBlockSize; /*!< The size in byte of P-Flash memory */
+ uint32_t DFlashBlockBase; /*!< For FlexNVM device, this is the base address of D-Flash memory (FlexNVM memory); For non-FlexNVM device, this field is unused */
+ uint32_t DFlashBlockSize; /*!< For FlexNVM device, this is the size in byte of area
+ which is used as D-Flash from FlexNVM
+ memory; For non-FlexNVM device, this field is unused */
+ uint32_t EERAMBlockBase; /*!< The base address of FlexRAM (for FlexNVM
+ device) or acceleration RAM memory (for non-FlexNVM device) */
+ uint32_t EEEBlockSize; /*!< For FlexNVM device, this is the size in byte of
+ EEPROM area which was partitioned from
+ FlexRAM; For non-FlexNVM device, this field is unused */
+ bool DebugEnable; /*!< Background debug mode enable */
+ PCALLBACK CallBack; /*!< Call back function to service the time critical events */
+} FLASH_SSD_CONFIG, *PFLASH_SSD_CONFIG;
+
+/* -------------------- Function Pointer ------------------------------- */
+/*! @brief FlashCommandSequence function poiter */
+typedef uint32_t (*pFLASHCOMMANDSEQUENCE) (PFLASH_SSD_CONFIG pSSDConfig);
+
+/*! @brief FlashInit function poiter */
+typedef uint32_t (*pFLASHINIT) (PFLASH_SSD_CONFIG pSSDConfig);
+
+/*! @brief PFlashGetProtection function poiter */
+typedef uint32_t (*pPFLASHGETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t* protectStatus);
+
+/*! @brief PFlashSetProtection function poiter */
+typedef uint32_t (*pPFLASHSETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t protectStatus);
+
+/*! @brief FlashGetSecurityState function poiter */
+typedef uint32_t (*pFLASHGETSECURITYSTATE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* securityState);
+
+/*! @brief FlashSecurityByPass function poiter */
+typedef uint32_t (*pFLASHSECURITYBYPASS) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* keyBuffer, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashEraseAllBlock function poiter */
+typedef uint32_t (*pFLASHERASEALLBLOCK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashEraseBlock function poiter */
+typedef uint32_t (*pFLASHERASEBLOCK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashEraseSector function poiter */
+typedef uint32_t (*pFLASHERASESECTOR) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*! @brief FlashEraseSuspend function poiter */
+typedef uint32_t (*pFLASHERASESUSPEND) (PFLASH_SSD_CONFIG pSSDConfig);
+
+/*! @brief FlashEraseResume function poiter */
+typedef uint32_t (*pFLASHERASERESUME) (PFLASH_SSD_CONFIG pSSDConfig);
+
+/*! @brief FlashProgramSection function poiter */
+typedef uint32_t (*pFLASHPROGRAMSECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashChecksum function poiter */
+typedef uint32_t (*pFLASHCHECKSUM) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint32_t* pSum);
+
+/*! @brief FlashVerifyAllBlock function poiter */
+typedef uint32_t (*pFLASHVERIFYALLBLOCK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! Flash verify block */
+typedef uint32_t (*pFLASHVERIFYBLOCK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashVerifySection function poiter */
+typedef uint32_t (*pFLASHVERIFYSECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashReadOnce function poiter */
+typedef uint32_t (*pFLASHREADONCE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashProgramOnce function poiter */
+typedef uint32_t (*pFLASHPROGRAMONCE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*! @brief FlashProgramCheck function poiter */
+typedef uint32_t (*pFLASHPROGRAMCHECK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pExpectedData, \
+ uint32_t* pFailAddr, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashReadResource function poiter */
+typedef uint32_t (*pFLASHREADRESOURCE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t* pDataArray, \
+ uint8_t resourceSelectCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashProgram function poiter */
+typedef uint32_t (*pFLASHPROGRAM) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief PFlashSwapCtrl function poiter */
+typedef uint32_t (*pPFLASHSWAPCTRL) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t addr, \
+ uint8_t swapcmd, \
+ uint8_t* pCurrentSwapMode,\
+ uint8_t* pCurrentSwapBlockStatus, \
+ uint8_t* pNextSwapBlockStatus, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief PFlashSwap function poiter */
+typedef uint32_t (*pFLASHSWAP)(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t flashAddress, \
+ PFLASH_SWAP_CALLBACK pSwapCallback, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief DFlashGetProtection function poiter */
+typedef uint32_t (*pDFLASHGETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* protectStatus);
+/*! @brief DFlashSetProtection function poiter */
+typedef uint32_t (*pDFLASHSETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t protectStatus);
+
+/*! @brief EERAMGetProtection function poiter */
+typedef uint32_t (*pEERAMGETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* protectStatus);
+
+/*! @brief EERAMSetProtection function poiter */
+typedef uint32_t (*pEERAMSETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t protectStatus);
+/*! @brief DEFlashParition function poiter */
+typedef uint32_t (*pDEFLASHPARTITION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEDataSizeCode, \
+ uint8_t DEPartitionCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*! @brief SetEEEEnable function poiter */
+typedef uint32_t (*pSETEEEENABLE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEEnable,pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*! @brief EEEWrite function poiter */
+typedef uint32_t (*pEEEWRITE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData);
+
+/*@}*/
+
+/*! @}*/
+#endif /* _SSD_TYPES_H_ */
diff --git a/plan_manage_main/src/drivers/FTFx/source/CopyToRam.c b/plan_manage_main/src/drivers/FTFx/source/CopyToRam.c
new file mode 100644
index 0000000..2751b4e
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/CopyToRam.c
@@ -0,0 +1,78 @@
+/************************************************************************
+ (c) Copyright 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : CopyToRam.c *
+* DATE : April 08, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+1.0.0 11.28.2013 FPT Team Initial version
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+*************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : RelocateFunction
+* Description : Relocate FlashCommandSequence to another address.
+* Arguments : uint32_t, uint32_t, pFLASHCOMMANDSEQUENCE
+* Return Value : pFLASHCOMMANDSEQUENCE
+*
+*************************************************************************/
+
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* end of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION RelocateFunction(uint32_t dest, uint32_t size, uint32_t src)
+{
+ uint32_t temp;
+ uint16_t value, i, *pSrc, *pDest;
+ temp = PGM2DATA((uint32_t)src - LAUNCH_COMMAND_OFFSET);
+ pSrc = (uint16_t *)temp;
+ pDest = (uint16_t *)dest;
+ temp = size >>1;
+ for (i = 0x0U; i < temp; i++)
+ {
+ value = READ16(pSrc);
+ pSrc++;
+ WRITE16(pDest, value);
+ pDest++;
+ }
+ return ((uint32_t)DATA2PGM((uint32_t)dest + LAUNCH_COMMAND_OFFSET));
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/DEFlashPartition.c b/plan_manage_main/src/drivers/FTFx/source/DEFlashPartition.c
new file mode 100644
index 0000000..cc9913b
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/DEFlashPartition.c
@@ -0,0 +1,102 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : DEFlashPartition.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : DEFlashPartition.c
+* Description : This function prepares the D/E-Flash block for use
+* as D-Flash, E-Flash or a combination of both and
+* initializes the EERAM.
+* Arguments : PFLASH_SSD_CONFIG, uint8_t,uint8_t, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+#if (DEBLOCK_SIZE != 0x0U)
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION DEFlashPartition(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEDataSizeCode, \
+ uint8_t DEPartitionCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_PROGRAM_PARTITION);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB4_OFFSET;
+ REG_WRITE(temp, EEEDataSizeCode);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB5_OFFSET;
+ REG_WRITE(temp, DEPartitionCode);
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+ return(ret);
+}
+#endif /* end of DEBLOCK_SIZE */
+/* end of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/DFlashGetProtection.c b/plan_manage_main/src/drivers/FTFx/source/DFlashGetProtection.c
new file mode 100644
index 0000000..f0145ce
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/DFlashGetProtection.c
@@ -0,0 +1,93 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : DFlashGetProtection.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/*************************************************************************
+*
+* Function Name : DFlashGetProtection.c
+* Description : This function retrieves current D-Flash protection status.
+* Arguments : PFLASH_SSD_CONFIG, uint8_t*
+* Return Value : uint32_t
+*
+*************************************************************************/
+#if (DEBLOCK_SIZE != 0x0U)
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION DFlashGetProtection(PFLASH_SSD_CONFIG pSSDConfig, uint8_t* protectStatus)
+{
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* Check if size of DFlash = 0 */
+ if(pSSDConfig->DFlashBlockSize == 0x0U)
+ {
+ ret = FTFx_ERR_EFLASHONLY;
+ }
+ else
+ {
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FDPROT_OFFSET;
+ *protectStatus = REG_READ(temp);
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+#endif /* End of DEBLOCK_SIZE */
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/DFlashSetProtection.c b/plan_manage_main/src/drivers/FTFx/source/DFlashSetProtection.c
new file mode 100644
index 0000000..5f5ef87
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/DFlashSetProtection.c
@@ -0,0 +1,104 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : DFlashSetProtection.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : DFlashSetProtection.c
+* Description : This function sets the D-Flash protection to the
+* intended protection status
+* Arguments : PFLASH_SSD_CONFIG, uint8_t
+* Return Value : uint32_t
+*
+*************************************************************************/
+#if (DEBLOCK_SIZE != 0x0U)
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION DFlashSetProtection(PFLASH_SSD_CONFIG pSSDConfig, uint8_t protectStatus)
+{
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* Check if size of DFlash = 0 */
+ if(pSSDConfig->DFlashBlockSize == 0x0U)
+ {
+ ret = FTFx_ERR_EFLASHONLY;
+ }
+ else
+ {
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FDPROT_OFFSET;
+ REG_WRITE(temp, protectStatus);
+
+ if ( protectStatus != REG_READ(temp))
+ {
+ ret = FTFx_ERR_CHANGEPROT;
+ }
+ else
+ {
+ /* do nothing */
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+#endif /* End of DEBLOCK_SIZE */
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/EEEWrite.c b/plan_manage_main/src/drivers/FTFx/source/EEEWrite.c
new file mode 100644
index 0000000..6d8f21a
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/EEEWrite.c
@@ -0,0 +1,177 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : EEEWrite.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : EEEWrite.c
+* Description : This function is used to write data to EERAM
+* when it is used as EEPROM emulator
+* Arguments : PFLASH_SSD_CONFIG, uint32_t, uint32_t, uint8_t, uint32_t
+* Return Value : uint32_t
+*
+************************************************************************/
+#if (DEBLOCK_SIZE != 0x0U)
+
+/* declare prototype */
+uint32_t WaitEEWriteToFinish(PFLASH_SSD_CONFIG pSSDConfig, uint32_t* dest,\
+ uint32_t* size, uint8_t** pData, uint8_t step);
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION WaitEEWriteToFinish(PFLASH_SSD_CONFIG pSSDConfig, uint32_t* dest,\
+ uint32_t* size, uint8_t** pData, uint8_t step)
+{
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ if (0x01U == step)
+ {
+ WRITE8(*dest, READ8(*pData));
+ }
+ if (0x02U == step)
+ {
+#if(BIG_ENDIAN == ENDIANNESS)
+ temp = (uint32_t)READ8(*pData) << 8;
+ temp |= (uint32_t)(READ8(*pData + 1));
+#else
+ temp = (uint32_t)READ8(*pData + 1) << 8;
+ temp |= (uint32_t)(READ8(*pData));
+#endif
+ WRITE16(BYTE2WORD(*dest), (uint16_t)temp);
+ }
+ if (0x04U == step)
+ {
+#if(BIG_ENDIAN == ENDIANNESS)
+ temp = (uint32_t)READ8(*pData) << 24;
+ temp |= (uint32_t)(READ8(*pData + 1)) << 16;
+ temp |= (uint32_t)(READ8(*pData + 2)) << 8;
+ temp |= (uint32_t)(READ8(*pData + 3));
+#else
+ temp = (uint32_t)READ8(*pData + 3) << 24;
+ temp |= (uint32_t)(READ8(*pData + 2)) << 16;
+ temp |= (uint32_t)(READ8(*pData + 1)) << 8;
+ temp |= (uint32_t)READ8(*pData);
+#endif
+ WRITE32(BYTE2WORD(*dest), (uint32_t)temp);
+ }
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCNFG_OFFSET;
+ while(0x0U == REG_BIT_GET(temp, FTFx_SSD_FCNFG_EEERDY))
+ {
+ /* wait till EEERDY bit is set */
+ }
+ /* Check for protection violation error */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ ret = (uint32_t)REG_READ(temp) & FTFx_SSD_FSTAT_FPVIOL;
+
+ *dest += step;
+ *size -= step;
+ *pData += step;
+
+ return ret;
+}
+
+uint32_t SIZE_OPTIMIZATION EEEWrite(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData)
+{
+ uint32_t ret = FTFx_OK; /* Return code variable */
+ uint32_t temp; /* variable temp */
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+ /* Check if EEE is enabled */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCNFG_OFFSET;
+ if(REG_READ(temp) & FTFx_SSD_FCNFG_EEERDY)
+ {
+ /* check range */
+ if((dest < WORD2BYTE(pSSDConfig->EERAMBlockBase)) || \
+ ((dest + size) > (WORD2BYTE(pSSDConfig->EERAMBlockBase) + pSSDConfig->EEEBlockSize)))
+ {
+ ret = FTFx_ERR_RANGE;
+ }
+
+ while ((size > 0x0U) && (ret == FTFx_OK))
+ {
+
+ /* dest is 32bit-aligned and size is not less than 4 */
+ if ((!(dest & 0x03U)) && (size >= 0x04U))
+ {
+ ret = WaitEEWriteToFinish(pSSDConfig, &dest, &size, &pData, 0x04U);
+ }
+ else if ((!(dest & 0x1U)) && (size >= 0x02U))
+ {
+ ret = WaitEEWriteToFinish(pSSDConfig, &dest, &size, &pData, 0x02U);
+ }
+ else
+ {
+ ret = WaitEEWriteToFinish(pSSDConfig, &dest, &size, &pData, 0x01U);
+ }
+ }
+ }
+ else
+ {
+ ret = FTFx_ERR_NOEEE;
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+ return(ret);
+}
+#endif /* of DEBLOCK_SIZE */
+/* end of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/EERAMGetProtection.c b/plan_manage_main/src/drivers/FTFx/source/EERAMGetProtection.c
new file mode 100644
index 0000000..b9c0713
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/EERAMGetProtection.c
@@ -0,0 +1,93 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : EERAMGetProtection.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : EERAMGetProtection.c
+* Description : This function retrieves current EERAM protection status.
+* Arguments : PFLASH_SSD_CONFIG, UINT8*
+* Return Value : UINT32
+*
+*************************************************************************/
+#if (DEBLOCK_SIZE != 0x0U)
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION EERAMGetProtection(PFLASH_SSD_CONFIG pSSDConfig, uint8_t* protectStatus)
+{
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* Check if EERAM is set for EEE */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCNFG_OFFSET;
+ if(0x0U != REG_BIT_GET(temp, FTFx_SSD_FCNFG_EEERDY))
+ {
+ /* EERAM is set for EEE */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FEPROT_OFFSET;
+ *protectStatus = REG_READ(temp);
+ }
+ else
+ {
+ ret = FTFx_ERR_NOEEE;
+ }
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+#endif /* End of DEBLOCK_SIZE */
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/EERAMSetProtection.c b/plan_manage_main/src/drivers/FTFx/source/EERAMSetProtection.c
new file mode 100644
index 0000000..c90ee0a
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/EERAMSetProtection.c
@@ -0,0 +1,105 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : EERAMSetProtection.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : EERAMSetProtection.c
+* Description : This function retrieves current EERAM protection status.
+* Arguments : PFLASH_SSD_CONFIG, UINT8
+* Return Value : uint32_t
+*
+*************************************************************************/
+#if (DEBLOCK_SIZE != 0x0U)
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION EERAMSetProtection(PFLASH_SSD_CONFIG pSSDConfig, uint8_t protectStatus)
+{
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* Check if EERAM is set for EEE */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCNFG_OFFSET;
+ if(0x0U == (REG_BIT_GET(temp, FTFx_SSD_FCNFG_EEERDY)))
+ {
+ /* EERAM is not set for EEE */
+ ret = FTFx_ERR_NOEEE;
+ }
+ else
+ {
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FEPROT_OFFSET;
+ REG_WRITE(temp, protectStatus);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FEPROT_OFFSET;
+ if ( protectStatus != REG_READ(temp))
+ {
+ ret = FTFx_ERR_CHANGEPROT;
+ }
+ else
+ {
+ /* do nothing */
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+#endif /* End of DEBLOCK_SIZE */
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashCheckSum.c b/plan_manage_main/src/drivers/FTFx/source/FlashCheckSum.c
new file mode 100644
index 0000000..9388f6f
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashCheckSum.c
@@ -0,0 +1,130 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashCheckSum.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/***********************************************************************
+*
+* Function Name : FlashCheckSum.c
+* Description : This function is used to calculate checksum value
+* for the specified flash range.
+* Arguments : PFLASH_SSD_CONFIG,uint32_t ,uint32_t ,uint32_t*
+* Return Value : uint32_t
+*
+************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashCheckSum(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint32_t* pSum)
+{
+ uint32_t counter; /* Counter for callback operation */
+ uint32_t data; /* Data read from Flash address */
+ uint32_t ret = FTFx_OK; /* Return code variable */
+ uint32_t endAddress; /* P Flash end address */
+
+ counter = 0x0U;
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+ /* calculating Flash end address */
+ endAddress = dest + size;
+
+ /* check for valid range of the target addresses */
+ if ((dest < WORD2BYTE(pSSDConfig->PFlashBlockBase)) ||
+ (endAddress > (WORD2BYTE(pSSDConfig->PFlashBlockBase) + pSSDConfig->PFlashBlockSize)))
+ {
+#if(DEBLOCK_SIZE)
+ if ((dest < WORD2BYTE(pSSDConfig->DFlashBlockBase)) ||
+ (endAddress > (WORD2BYTE(pSSDConfig->DFlashBlockBase) + pSSDConfig->DFlashBlockSize)))
+ {
+#endif /* End of if(DEBLOCK_SIZE) */
+ /* return an error code FTFx_ERR_RANGE */
+ ret = FTFx_ERR_RANGE;
+ size = 0x0U;
+#if(DEBLOCK_SIZE)
+ }
+
+#endif /* End of if(DEBLOCK_SIZE) */
+ }
+ *pSum = 0x0U;
+ /* doing sum operation */
+ while(size > 0x0U)
+ {
+ data = READ8(dest);
+ *pSum += (uint32_t)data;
+ dest += 0x01U;
+ size -= 0x01U;
+
+ /* Check if need to serve callback function */
+ if((++counter) >= FLASH_CALLBACK_CS)
+ {
+ /* serve callback function if counter reaches limitation */
+ if(NULL_CALLBACK != pSSDConfig->CallBack)
+ {
+ (pSSDConfig->CallBack)();
+ }
+ /* Reset counter */
+ counter = 0x0U;
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+ return(ret);
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashCommandSequence.c b/plan_manage_main/src/drivers/FTFx/source/FlashCommandSequence.c
new file mode 100644
index 0000000..4811c68
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashCommandSequence.c
@@ -0,0 +1,91 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashCommandSequence.c *
+* DATE : April 08, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+/************************************************************************
+*
+* Function Name : FlashCommandSequence.c
+* Description : Perform command write sequence for flash operation
+* Arguments : PFLASH_SSD_CONFIG, UINT8, UINT8*
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashCommandSequence (PFLASH_SSD_CONFIG pSSDConfig )
+
+{
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* clear CCIF to launch command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_BIT_SET(temp, FTFx_SSD_FSTAT_CCIF);
+
+ /* wait for completion of this command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ while(0x0U == (REG_BIT_GET(temp, FTFx_SSD_FSTAT_CCIF)))
+ {
+ /* wait till CCIF bit is set */
+ /* serve callback function if counter reaches limitation */
+ if(NULL_CALLBACK != pSSDConfig->CallBack)
+ {
+ (pSSDConfig->CallBack)();
+ }
+ }
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ ret = ((uint32_t)(REG_READ(temp)) & FTFx_SSD_FSTAT_ERROR_BITS);
+ return(ret);
+}
+
+/* End of file */
+
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashEraseAllBlock.c b/plan_manage_main/src/drivers/FTFx/source/FlashEraseAllBlock.c
new file mode 100644
index 0000000..d3c2558
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashEraseAllBlock.c
@@ -0,0 +1,96 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashEraseAllBlock.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashEraseAllBlock.c
+* Description : The Erase All Blocks operation will erase all Flash
+ memory, initialize the EERAM, verify all memory
+ contents, then release MCU security.
+* Arguments : PFLASH_SSD_CONFIG, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashEraseAllBlock (PFLASH_SSD_CONFIG pSSDConfig, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_ERASE_ALL_BLOCK);
+
+ /* calling flash command sequence function to execute the command */
+
+ ret = pFlashCommandSequence(pSSDConfig);
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashEraseBlock.c b/plan_manage_main/src/drivers/FTFx/source/FlashEraseBlock.c
new file mode 100644
index 0000000..40629ed
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashEraseBlock.c
@@ -0,0 +1,130 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashEraseBlock.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashEraseBlock.c
+* Description : The Erase Flash Block operation will erase all addresses in a single P-Flash or D-Flash block.
+* Arguments : PFLASH_SSD_CONFIG, uint32_t, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+#if (!(defined(FTFA_M)) || (defined(BLOCK_COMMANDS)))
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashEraseBlock (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+ /* check if the destination is aligned or not */
+#if (DEBLOCK_SIZE)
+ temp = WORD2BYTE(pSSDConfig->DFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->DFlashBlockSize)))
+ {
+ dest = dest - temp + 0x800000U;
+ }
+ else
+#endif
+ {
+ temp = WORD2BYTE(pSSDConfig->PFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->PFlashBlockSize)))
+ {
+ dest -= temp;
+ }
+ else
+ {
+ ret = FTFx_ERR_ACCERR;
+ }
+ }
+
+ if(FTFx_OK == ret)
+ {
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_ERASE_BLOCK);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(dest));
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+ }
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+#endif /* End of FTFE_M and BLOCK_COMMANDS*/
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashEraseResume.c b/plan_manage_main/src/drivers/FTFx/source/FlashEraseResume.c
new file mode 100644
index 0000000..adfaed5
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashEraseResume.c
@@ -0,0 +1,100 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashEraseResume.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashEraseResume.c
+* Description : This function is used to resume a previous suspended
+* operation of flash erase sector command.
+* Arguments : PFLASH_SSD_CONFIG
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashEraseResume(PFLASH_SSD_CONFIG pSSDConfig)
+
+{
+ uint16_t i; /* counter variable */
+ uint32_t temp; /* temporary variable */
+ i = 0x0U;
+
+ /* check ERSSUSP bit of the flash configuration register */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCNFG_OFFSET;
+ if(0x0U != REG_BIT_GET(temp, FTFx_SSD_FCNFG_ERSSUSP))
+ {
+ /* clear CCIF to launch command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_BIT_SET(temp, FTFx_SSD_FSTAT_CCIF);
+ /* wait for completion of this command */
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ while((0x0U == (REG_BIT_GET(temp, FTFx_SSD_FSTAT_CCIF))) || (i > RESUME_WAIT_CNT))
+ {
+ i++;
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(FTFx_OK);
+}
+
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashEraseSector.c b/plan_manage_main/src/drivers/FTFx/source/FlashEraseSector.c
new file mode 100644
index 0000000..6367bfa
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashEraseSector.c
@@ -0,0 +1,148 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashEraseResume.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+
+/****************************************************************************
+*
+* Function Name : FlashEraseSector
+* Description : Perform erase operation on Flash
+* Arguments : PFLASH_SSD_CONFIG, uint32_t, uint32_t, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*****************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashEraseSector(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t sectorSize; /* size of one sector */
+ uint32_t temp; /* temporary variable */
+
+
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+
+#if (DEBLOCK_SIZE)
+ temp = WORD2BYTE(pSSDConfig->DFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->DFlashBlockSize)))
+ {
+ dest = dest - temp + 0x800000U;
+ sectorSize = FTFx_DSECTOR_SIZE;
+ }
+ else
+#endif
+ {
+ temp = WORD2BYTE(pSSDConfig->PFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->PFlashBlockSize)))
+ {
+ dest -= temp;
+ sectorSize = FTFx_PSECTOR_SIZE;
+ }
+ else
+ {
+ ret = FTFx_ERR_ACCERR;
+ size = 0x0U;
+ }
+ }
+
+ /* check if the size is sector alignment or not */
+ if(size & (sectorSize - 0x01U))
+ {
+ /* return an error code FTFx_ERR_SIZE */
+ ret = FTFx_ERR_SIZE;
+ }
+
+ while((size > 0x0U) && (FTFx_OK == ret))
+ {
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_ERASE_SECTOR);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(dest));
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+
+ /* update size and destination address */
+ size -= sectorSize;
+ dest += sectorSize;
+
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+/* End of file */
+
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashEraseSuspend.c b/plan_manage_main/src/drivers/FTFx/source/FlashEraseSuspend.c
new file mode 100644
index 0000000..8cb2250
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashEraseSuspend.c
@@ -0,0 +1,95 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashEraseSuspend.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashEraseSuspend.c
+* Description : This function is used to suspend a current operation
+* of flash erase sector command.
+* Arguments : PFLASH_SSD_CONFIG
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashEraseSuspend(PFLASH_SSD_CONFIG pSSDConfig)
+{
+ uint32_t temp; /* temporary variable */
+ /* check CCIF bit of the flash status register */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ if(0x0U == (REG_BIT_GET(temp, FTFx_SSD_FSTAT_CCIF)))
+ {
+ /* If the command write sequence in progressing, */
+ /* Set ERSSUSP bit in FCNFG register */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCNFG_OFFSET;
+ REG_BIT_SET(temp, FTFx_SSD_FCNFG_ERSSUSP);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ while(0x0U == (REG_BIT_GET(temp, FTFx_SSD_FSTAT_CCIF)))
+ {
+ /* wait till CCIF bit is set */
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(FTFx_OK);
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashGetSecurityState.c b/plan_manage_main/src/drivers/FTFx/source/FlashGetSecurityState.c
new file mode 100644
index 0000000..b88c85c
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashGetSecurityState.c
@@ -0,0 +1,107 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashGetSecurityState.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+/************************************************************************
+*
+* Function Name : FlashGetSecurityState.c
+* Description : This function retrieves the current Flash security
+* status, including the security enabling state and
+* the backdoor key enabling state.
+* Arguments : PFLASH_SSD_CONFIG, uint8_t*
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashGetSecurityState(PFLASH_SSD_CONFIG pSSDConfig, uint8_t* securityState)
+{
+ /* store data read from flash register */
+ uint8_t regValue;
+ uint32_t temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSEC_OFFSET;
+
+ /*Get flash security register value */
+ regValue = REG_READ(temp);
+
+ /* check the status of the flash security bits in the security register */
+ if(FLASH_SECURITY_STATE_UNSECURED == (regValue & FTFx_SSD_FSEC_SEC))
+ {
+ /* Flash in unsecured state */
+ *securityState = FLASH_NOT_SECURE;
+ }
+ else
+ {
+ /* Flash in secured state */
+ /* check for backdoor key security enable bit */
+ if(FLASH_SECURITY_STATE_KEYEN == (regValue & FTFx_SSD_FSEC_KEYEN))
+ {
+ /* Backdoor key security enabled */
+ *securityState = FLASH_SECURE_BACKDOOR_ENABLED;
+ }
+ else
+ {
+ /* Backdoor key security disabled */
+ *securityState = FLASH_SECURE_BACKDOOR_DISABLED;
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(FTFx_OK);
+}
+
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashInit.c b/plan_manage_main/src/drivers/FTFx/source/FlashInit.c
new file mode 100644
index 0000000..f4fb121
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashInit.c
@@ -0,0 +1,172 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashInit.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashInit.c
+* Description : Initialize the Flash memory
+* Arguments : PFLASH_SSD_CONFIG
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashInit (PFLASH_SSD_CONFIG pSSDConfig)
+{
+#if (DEBLOCK_SIZE != 0x0U)
+ uint8_t EEEDataSetSize; /* store EEE Data Set Size */
+ uint8_t DEPartitionCode; /* store D/E-Flash Partition Code */
+ uint32_t temp; /* temporary variable */
+
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* Write Command Code to FCCOB0 */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_READ_RESOURCE);
+
+ /* Write address to FCCOB1/2/3 */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(DFLASH_IFR_READRESOURCE_ADDRESS));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(DFLASH_IFR_READRESOURCE_ADDRESS));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(DFLASH_IFR_READRESOURCE_ADDRESS));
+
+ /* Write Resource Select Code of 0 to FCCOB8 to select IFR. Without this, */
+ /* an access error may occur if the register contains data from a previous command. */
+ /* for FTFE module, resource code is FCCOB4. For others, recource code is FCCOB8 */
+ temp = pSSDConfig->ftfxRegBase + RSRC_CODE_OFSSET;
+ REG_WRITE(temp, 0x0U);
+
+ /* clear CCIF bit */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_BIT_SET(temp, FTFx_SSD_FSTAT_CCIF);
+
+ /* check CCIF bit */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ while((REG_BIT_GET(temp, FTFx_SSD_FSTAT_CCIF)) == 0x0U)
+ {
+ /* wait till CCIF bit is set */
+ }
+ /* read out EEdata set size and DEpartition code from FCCOBA, FCCOBB for FTFE module, from FCCOB6 and FCCOB7 for others */
+ #ifdef FTFE_M
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOBA_OFFSET;
+ EEEDataSetSize = REG_READ(temp);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOBB_OFFSET;
+ DEPartitionCode = REG_READ(temp);
+ #else
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB6_OFFSET;
+ EEEDataSetSize = REG_READ(temp);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB7_OFFSET;
+ DEPartitionCode = REG_READ(temp);
+ #endif
+ DEPartitionCode = DEPartitionCode & 0x0FU;
+ EEEDataSetSize = EEEDataSetSize & 0x0FU;
+ /* Calculate D-Flash size and EEE size */
+ if (0x0U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_0000;}
+ else if (0x01U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_0001;}
+ else if (0x02U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_0010;}
+ else if (0x03U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_0011;}
+ else if (0x04U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_0100;}
+ else if (0x05U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_0101;}
+ else if (0x06U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_0110;}
+ else if (0x07U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_0111;}
+ else if (0x08U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_1000;}
+ else if (0x09U == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_1001;}
+ else if (0x0AU == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_1010;}
+ else if (0x0BU == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_1011;}
+ else if (0x0CU == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_1100;}
+ else if (0x0DU == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_1101;}
+ else if (0x0EU == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_1110;}
+ else if (0x0FU == DEPartitionCode) {pSSDConfig->DFlashBlockSize = DEPART_1111;}
+
+ if (0x0U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_0000;}
+ else if (0x01U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_0001;}
+ else if (0x02U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_0010;}
+ else if (0x03U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_0011;}
+ else if (0x04U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_0100;}
+ else if (0x05U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_0101;}
+ else if (0x06U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_0110;}
+ else if (0x07U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_0111;}
+ else if (0x08U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_1000;}
+ else if (0x09U == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_1001;}
+ else if (0x0AU == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_1010;}
+ else if (0x0BU == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_1011;}
+ else if (0x0CU == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_1100;}
+ else if (0x0DU == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_1101;}
+ else if (0x0EU == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_1110;}
+ else if (0x0FU == EEEDataSetSize) {pSSDConfig->EEEBlockSize = EEESIZE_1111;}
+
+#else /* DEBLOCK_SIZE == 0 */
+ /* If size of D/E-Flash = 0 */
+ pSSDConfig->DFlashBlockSize = 0x0U;
+ pSSDConfig->EEEBlockSize = 0x0U;
+#endif /* end of DEBLOCK_SIZE */
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(FTFx_OK);
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashProgram.c b/plan_manage_main/src/drivers/FTFx/source/FlashProgram.c
new file mode 100644
index 0000000..d53802b
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashProgram.c
@@ -0,0 +1,150 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashProgram.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+/************************************************************************
+*
+* Function Name : FlashProgram.c
+* Description : Program data into Flash
+* Arguments : PFLASH_SSD_CONFIG, uint32_t, uint32_t, uint32_t,
+* pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashProgram(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint8_t i;
+ uint32_t temp;
+
+ if (size & (PGM_SIZE_BYTE - 0x01U))
+ {
+ ret = FTFx_ERR_SIZE;
+ }
+ else
+ {
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+#if (DEBLOCK_SIZE)
+ temp = WORD2BYTE(pSSDConfig->DFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->DFlashBlockSize)))
+ {
+ dest = dest - temp + 0x800000U;
+ }
+ else
+#endif
+ {
+ temp = WORD2BYTE(pSSDConfig->PFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->PFlashBlockSize)))
+ {
+ dest -= temp;
+ }
+ else
+ {
+ ret = FTFx_ERR_ACCERR;
+ }
+ }
+ while((size > 0x0U) && (FTFx_OK == ret))
+ {
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+ /* passing parameter to the command */
+#if (PGM_SIZE_BYTE == FTFx_PHRASE_SIZE)
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_PROGRAM_PHRASE);
+#else
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_PROGRAM_LONGWORD);
+#endif
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(dest));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(dest));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(dest));
+
+ for (i = 0x0U; i < PGM_SIZE_BYTE; i++)
+ {
+ temp = pSSDConfig->ftfxRegBase + i + 0x08U;
+ REG_WRITE(temp, *(pData + i));
+ }
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+
+ /* update destination address for next iteration */
+ dest += PGM_SIZE_BYTE;
+ /* update size for next iteration */
+ size -= PGM_SIZE_BYTE;
+ /* increment the source address by 1 */
+ pData += PGM_SIZE_BYTE;
+ }
+ }
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+/* end of file */
+
+
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashProgramCheck.c b/plan_manage_main/src/drivers/FTFx/source/FlashProgramCheck.c
new file mode 100644
index 0000000..f06d92c
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashProgramCheck.c
@@ -0,0 +1,174 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashProgramCheck.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashProgramCheck.c
+* Description : The Program Check command tests a previously
+* programmed P-Flash or D-Flash longword to see
+* if it reads correctly at the specified margin level.
+* Arguments : PFLASH_SSD_CONFIG, uint32_t,uint32_t, uint8_t*, uint32_t*,
+* uint8_t*, uint8_t, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashProgramCheck(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pExpectedData, \
+ uint32_t* pFailAddr, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+
+ uint32_t ret; /* return code variable */
+ uint32_t offsetAddr ; /* offset address to convert to internal memory address */
+ uint32_t temp; /* temporary variable */
+ uint8_t i;
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+ if (size & (PGMCHK_ALIGN_SIZE - 0x01U))
+ {
+ ret = FTFx_ERR_SIZE;
+
+ }
+ else
+ {
+ /* check if the destination is aligned or not */
+#if (DEBLOCK_SIZE)
+ offsetAddr = WORD2BYTE(pSSDConfig->DFlashBlockBase);
+ if((dest >= offsetAddr) && (dest < (offsetAddr + pSSDConfig->DFlashBlockSize)))
+ {
+ dest = dest - offsetAddr + 0x800000U;
+ }
+ else
+#endif
+ {
+ offsetAddr = WORD2BYTE(pSSDConfig->PFlashBlockBase);
+ if((dest >= offsetAddr) && (dest < offsetAddr + pSSDConfig->PFlashBlockSize))
+ {
+ dest -= offsetAddr;
+ }
+ else
+ {
+ ret = FTFx_ERR_ACCERR;
+ size = 0x0U;
+ }
+ }
+ while (size)
+ {
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_PROGRAM_CHECK);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB4_OFFSET;
+ REG_WRITE(temp, marginLevel);
+
+ for (i = 0x0U; i < PGMCHK_ALIGN_SIZE; i++)
+ {
+ temp = pSSDConfig->ftfxRegBase + i + 0x0CU;
+ REG_WRITE(temp, *(pExpectedData + i));
+ }
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+
+ /* checking for the success of command execution */
+ if(FTFx_OK != ret)
+ {
+#if (DEBLOCK_SIZE)
+ if(dest >= 0x800000U)
+ {
+ *pFailAddr = BYTE2WORD(dest + offsetAddr - 0x800000U);
+ size = PGMCHK_ALIGN_SIZE;
+ }
+ else
+#endif
+ {
+ *pFailAddr = BYTE2WORD(dest + offsetAddr);
+ size = PGMCHK_ALIGN_SIZE;
+ }
+ }
+ size -= PGMCHK_ALIGN_SIZE;
+ pExpectedData += PGMCHK_ALIGN_SIZE;
+ dest += PGMCHK_ALIGN_SIZE;
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+/* end of file */
+
+
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashProgramOnce.c b/plan_manage_main/src/drivers/FTFx/source/FlashProgramOnce.c
new file mode 100644
index 0000000..09ac77c
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashProgramOnce.c
@@ -0,0 +1,109 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashProgramOnce.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+/************************************************************************
+*
+* Function Name : FlashProgramOnce.c
+* Description : Program a data record into a dedicated 64 bytes
+* (divided into 16 data records) region in
+* the P-Flash IFR which stores critical information
+* for the user
+* Arguments : PFLASH_SSD_CONFIG, uint8_t , uint8_t*, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashProgramOnce(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t recordIndex,\
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+
+ uint8_t i;
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_PROGRAM_ONCE);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, recordIndex);
+
+ for (i = 0x0U; i < PGM_SIZE_BYTE; i ++)
+ {
+ temp = pSSDConfig->ftfxRegBase + i + 0x08U;
+ REG_WRITE(temp, pDataArray[i]);
+ }
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+
+/* End of file */
+
+
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashProgramSection.c b/plan_manage_main/src/drivers/FTFx/source/FlashProgramSection.c
new file mode 100644
index 0000000..98f290d
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashProgramSection.c
@@ -0,0 +1,148 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashProgramSection.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+/************************************************************************
+*
+* Function Name : FlashProgramSection.c
+* Description : Program data into Flash
+* Arguments : PFLASH_SSD_CONFIG, uint32_t, uint16_t,
+* pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+#ifndef FTFA_M
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashProgramSection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp;
+
+ /* check RAMRDY bit of the flash configuration register */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCNFG_OFFSET;
+ if(0x0U == (REG_BIT_GET(temp, FTFx_SSD_FCNFG_RAMRDY)))
+ {
+ /* return an error code FTFx_ERR_RAMRDY */
+ ret = FTFx_ERR_RAMRDY;
+ }
+ else
+ {
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+#if (DEBLOCK_SIZE)
+ temp = WORD2BYTE(pSSDConfig->DFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->DFlashBlockSize)))
+ {
+ dest = dest - temp + 0x800000U;
+ }
+ else
+#endif
+ {
+ temp = WORD2BYTE(pSSDConfig->PFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->PFlashBlockSize)))
+ {
+ dest -= temp;
+ }
+ else
+ {
+ ret = FTFx_ERR_ACCERR;
+ }
+ }
+
+ if(ret == FTFx_OK)
+ {
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_PROGRAM_SECTION);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB4_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(number));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB5_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(number));
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+
+#endif /* End of FTFA */
+/* End of file */
+
+
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashReadOnce.c b/plan_manage_main/src/drivers/FTFx/source/FlashReadOnce.c
new file mode 100644
index 0000000..51c1ac7
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashReadOnce.c
@@ -0,0 +1,106 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashReadOnce.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashReadOnce.c
+* Description : This function is used to read access to a reserved
+* 64 byte field located in the P-Flash IFR.
+* Arguments : PFLASH_SSD_CONFIG, uint8_t*, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashReadOnce(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t recordIndex,\
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint8_t i;
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_READ_ONCE);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, recordIndex);
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+ /* checking for the success of command execution */
+ if(FTFx_OK == ret)
+ {
+ /* Read the data from the FCCOB registers into the pDataArray */
+ for (i = 0x0U; i < PGM_SIZE_BYTE; i ++)
+ {
+ temp = pSSDConfig->ftfxRegBase + i + 0x08U;
+ pDataArray[i] = REG_READ(temp);
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+ return(ret);
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashReadResource.c b/plan_manage_main/src/drivers/FTFx/source/FlashReadResource.c
new file mode 100644
index 0000000..fd5fd28
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashReadResource.c
@@ -0,0 +1,138 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashReadResource.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+/************************************************************************
+*
+* Function Name : FlashReadResource.c
+* Description : This function is provided for the user to read data
+* from P-Flash IFR and D-Flash IFR space.
+* Arguments : PFLASH_SSD_CONFIG, uint32_t, uint8_t*, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashReadResource(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t* pDataArray, \
+ uint8_t resourceSelectCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint8_t i;
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp;
+
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+ /* check if the destination is aligned or not */
+#if (DEBLOCK_SIZE)
+ temp = WORD2BYTE(pSSDConfig->DFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->DFlashBlockSize)))
+ {
+ dest = dest - temp + 0x800000U;
+ }
+ else
+#endif
+ {
+ temp = WORD2BYTE(pSSDConfig->PFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->PFlashBlockSize)))
+ {
+ dest -= temp;
+ }
+ else
+ {
+ ret = FTFx_ERR_ACCERR;
+ }
+ }
+ if(ret == FTFx_OK)
+ {
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_READ_RESOURCE);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(dest));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(dest));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(dest));
+
+ temp = pSSDConfig->ftfxRegBase + RSRC_CODE_OFSSET;
+ REG_WRITE(temp, resourceSelectCode);
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+
+ if (FTFx_OK == ret)
+ {
+ /* Read the data from the FCCOB registers into the pDataArray */
+ for (i = 0x0U; i < PGM_SIZE_BYTE; i ++)
+ {
+ temp = pSSDConfig->ftfxRegBase + i + 0x08U;
+ pDataArray[i] = REG_READ(temp);
+ }
+ }
+ }
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashSecurityBypass.c b/plan_manage_main/src/drivers/FTFx/source/FlashSecurityBypass.c
new file mode 100644
index 0000000..0fdc7fd
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashSecurityBypass.c
@@ -0,0 +1,100 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashSecurityBypass.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashSecurityBypass.c
+* Description : If the MCU is secured state, this function will
+* unsecure the MCU by comparing the provided backdoor
+* key with ones in the Flash Configuration Field.
+* Arguments : PFLASH_SSD_CONFIG, uint8_t*, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashSecurityBypass(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* keyBuffer, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+ uint8_t i;
+
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_SECURITY_BY_PASS);
+ for (i = 0x0U; i < 0x08U; i++)
+ {
+ temp = pSSDConfig->ftfxRegBase + i + 0x08U;
+ REG_WRITE(temp, keyBuffer[i]);
+ }
+ ret = pFlashCommandSequence(pSSDConfig);
+
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashVerifyAllBlock.c b/plan_manage_main/src/drivers/FTFx/source/FlashVerifyAllBlock.c
new file mode 100644
index 0000000..6b9b3ea
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashVerifyAllBlock.c
@@ -0,0 +1,98 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashVerifyAllBlock.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashVerifyAllBlock.c
+* Description : This function will check to see if the P-Flash
+* and D-Flash blocks as well as EERAM, E-Flash records
+* and D-Flash IFR have been erased to the specified read
+* margin level, if applicable, and will release security
+* if the readout passes.
+* Arguments : PFLASH_SSD_CONFIG,uint8_t, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashVerifyAllBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_VERIFY_ALL_BLOCK);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, marginLevel);
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+/* end of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashVerifyBlock.c b/plan_manage_main/src/drivers/FTFx/source/FlashVerifyBlock.c
new file mode 100644
index 0000000..6b2b840
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashVerifyBlock.c
@@ -0,0 +1,134 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashEraseBlock.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashVerifyBlock.c
+* Description : This function will check to see if an entire
+* P-Flash or D-Flash block has been erased to the
+* specified margin level.
+* Arguments : PFLASH_SSD_CONFIG, uint32_t,uint8_t, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+#if (!(defined(FTFA_M)) || (defined(BLOCK_COMMANDS)))
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashVerifyBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp;
+
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+ /* check if the destination is aligned or not */
+#if (DEBLOCK_SIZE)
+ temp = WORD2BYTE(pSSDConfig->DFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->DFlashBlockSize)))
+ {
+ dest = dest - temp + 0x800000U;
+ }
+ else
+#endif
+ {
+ temp = WORD2BYTE(pSSDConfig->PFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->PFlashBlockSize)))
+ {
+ dest -= temp;
+ }
+ else
+ {
+ ret = FTFx_ERR_ACCERR;
+ }
+ }
+ if(FTFx_OK == ret)
+ {
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_VERIFY_BLOCK);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(dest));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB4_OFFSET;
+ REG_WRITE(temp, marginLevel);
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+ }
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+#endif /* End of FTFE_M and BLOCK_COMMANDS*/
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/FlashVerifySection.c b/plan_manage_main/src/drivers/FTFx/source/FlashVerifySection.c
new file mode 100644
index 0000000..44fab3f
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/FlashVerifySection.c
@@ -0,0 +1,134 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FlashVerifySection.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : FlashVerifySection.c
+* Description : This function will check to see if a section of
+* P-Flash or D-Flash memory is erased to the specified
+* read margin level.
+* Arguments : PFLASH_SSD_CONFIG,uint32_t,uint16_t,uint8_t, pFLASHCOMMANDSEQUENCE
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION FlashVerifySection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret = FTFx_OK; /* return code variable */
+ uint32_t temp;
+
+ /* convert to byte address */
+ dest = WORD2BYTE(dest);
+ /* check if the destination is aligned or not */
+#if (DEBLOCK_SIZE)
+ temp = WORD2BYTE(pSSDConfig->DFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->DFlashBlockSize)))
+ {
+ dest = dest - temp + 0x800000U;
+ }
+ else
+#endif
+ {
+ temp = WORD2BYTE(pSSDConfig->PFlashBlockBase);
+ if((dest >= temp) && (dest < (temp + pSSDConfig->PFlashBlockSize)))
+ {
+ dest -= temp;
+ }
+ else
+ {
+ ret = FTFx_ERR_ACCERR;
+ }
+ }
+ if(FTFx_OK == ret)
+ {
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_VERIFY_SECTION);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(dest));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(dest));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(dest));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB4_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(number));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB5_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(number));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB6_OFFSET;
+ REG_WRITE(temp, marginLevel);
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+ }
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/PFlashGetProtection.c b/plan_manage_main/src/drivers/FTFx/source/PFlashGetProtection.c
new file mode 100644
index 0000000..898d3f4
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/PFlashGetProtection.c
@@ -0,0 +1,91 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : PFlashGetProtection.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : PFlashGetProtection.c
+* Description : This function retrieves current P-Flash protection status.
+* Arguments : PFLASH_SSD_CONFIG, uint32_t*
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION PFlashGetProtection(PFLASH_SSD_CONFIG pSSDConfig, uint32_t* protectStatus)
+{
+ uint32_t reg0, reg1, reg2, reg3;
+ uint32_t temp; /* temporary variable */
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FPROT0_OFFSET;
+ reg0 = REG_READ(temp);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FPROT1_OFFSET;
+ reg1 = REG_READ(temp);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FPROT2_OFFSET;
+ reg2 = REG_READ(temp);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FPROT3_OFFSET;
+ reg3 = REG_READ(temp);
+
+ *protectStatus = (uint32_t)((uint32_t)(reg0 << 24) | (uint32_t)(reg1 << 16) | (uint32_t)(reg2 << 8) | reg3);
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(FTFx_OK);
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/PFlashSetProtection.c b/plan_manage_main/src/drivers/FTFx/source/PFlashSetProtection.c
new file mode 100644
index 0000000..d4ab2ff
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/PFlashSetProtection.c
@@ -0,0 +1,108 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : PFlashSetProtection.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp0, temp1, temp2, temp3 variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : PFlashSetProtection.c
+* Description : This function sets the P-Flash protection to the
+* intended protection status
+* Arguments : PFLASH_SSD_CONFIG, uint32_t
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION PFlashSetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t protectStatus)
+{
+ uint32_t ret = FTFx_OK;
+ uint32_t addr;
+ uint32_t temp0, temp1, temp2, temp3;
+ uint8_t reg0, reg1, reg2, reg3;
+
+ reg0 = GET_BIT_24_31(protectStatus);
+ reg1 = GET_BIT_16_23(protectStatus);
+ reg2 = GET_BIT_8_15(protectStatus);
+ reg3 = GET_BIT_0_7(protectStatus);
+
+ addr = pSSDConfig->ftfxRegBase + FTFx_SSD_FPROT0_OFFSET;
+ REG_WRITE(addr, reg0);
+ temp0 = REG_READ(addr);
+ addr = pSSDConfig->ftfxRegBase + FTFx_SSD_FPROT1_OFFSET;
+ REG_WRITE(addr, reg1);
+ temp1 = REG_READ(addr);
+ addr = pSSDConfig->ftfxRegBase + FTFx_SSD_FPROT2_OFFSET;
+ REG_WRITE(addr, reg2);
+ temp2 = REG_READ(addr);
+ addr = pSSDConfig->ftfxRegBase + FTFx_SSD_FPROT3_OFFSET;
+ REG_WRITE(addr, reg3);
+ temp3 = REG_READ(addr);
+
+ /* Read the value of FPPROT registers */
+ if ((temp0 != reg0) || (temp1 != reg1) || (temp2 != reg2) || (temp3 != reg3))
+ {
+ ret = FTFx_ERR_CHANGEPROT;
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/PFlashSwap.c b/plan_manage_main/src/drivers/FTFx/source/PFlashSwap.c
new file mode 100644
index 0000000..bda03c3
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/PFlashSwap.c
@@ -0,0 +1,163 @@
+/**HEADER********************************************************************
+ Copyright (c) 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the Freescale Semiconductor, Inc. nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+*
+* Standard Software Flash Driver For FTFx
+*
+* FILE NAME : PFlashSwap.c
+* DATE : Oct 10, 2014
+*
+* AUTHOR : FPT Team
+* E-mail : r56611@freescale.com
+*
+*****************************************************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Support NULL_SWAP_CALLBACK or custom
+ Swap Callback
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+*END*************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+#ifdef SWAP_M
+/************************************************************************
+*
+* Function Name : PFlashSwap.c
+* Description : Perform a swap between P-Flash block 0 and
+* P-Flash block 1
+*
+*
+* Arguments : PFLASH_SSD_CONFIG, uint32_t, pFLASHCOMMANDSEQUENCE,
+* PSWAP_CALLBACK
+*
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* End of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION PFlashSwap(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t addr, \
+ PFLASH_SWAP_CALLBACK pSwapCallback, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret = FTFx_OK; /* Return code */
+ uint8_t currentSwapMode , currentSwapBlockStatus , nextSwapBlockStatus;
+ bool swapContinue;
+
+ currentSwapMode = currentSwapBlockStatus = nextSwapBlockStatus = 0xFFU;
+ swapContinue = FALSE;
+
+ /* Report current swap state */
+ ret = PFlashSwapCtl(pSSDConfig,addr,FTFx_SWAP_REPORT_STATUS,¤tSwapMode, \
+ ¤tSwapBlockStatus, &nextSwapBlockStatus ,pFlashCommandSequence);
+
+ if (FTFx_OK == ret)
+ {
+ if ((FTFx_SWAP_UNINIT == currentSwapMode) || (FTFx_SWAP_READY == currentSwapMode) || \
+ (FTFx_SWAP_UPDATE == currentSwapMode))
+ {
+ /* If current swap mode is Uninitialized */
+ if (FTFx_SWAP_UNINIT == currentSwapMode)
+ {
+ /* Initialize Swap to Initialized/READY state */
+ ret = PFlashSwapCtl(pSSDConfig, addr, FTFx_SWAP_SET_INDICATOR_ADDR,¤tSwapMode, \
+ ¤tSwapBlockStatus, &nextSwapBlockStatus , pFlashCommandSequence);
+ }
+ /* If current swap mode is Initialized/Ready */
+ else if (FTFx_SWAP_READY == currentSwapMode)
+ {
+ /* Initialize Swap to UPDATE state */
+ ret = PFlashSwapCtl(pSSDConfig, addr, FTFx_SWAP_SET_IN_PREPARE,¤tSwapMode, \
+ ¤tSwapBlockStatus, &nextSwapBlockStatus , pFlashCommandSequence);
+ }
+ else if (FTFx_SWAP_UPDATE == currentSwapMode){}
+
+ /* Check for the success of command execution */
+ /* Report the current swap state to user via callback */
+ if ((NULL_SWAP_CALLBACK != pSwapCallback) && (FTFx_OK == ret))
+ {
+ swapContinue = pSwapCallback(currentSwapMode);
+
+ if (swapContinue)
+ {
+ /* Report current swap state */
+ ret = PFlashSwapCtl(pSSDConfig,addr,FTFx_SWAP_REPORT_STATUS,¤tSwapMode, \
+ ¤tSwapBlockStatus, &nextSwapBlockStatus , pFlashCommandSequence);
+ }
+ }
+ }
+ if ((NULL_SWAP_CALLBACK == pSwapCallback)&&(FTFx_SWAP_UPDATE == currentSwapMode))
+ {
+ /* Erase indicator sector in non active block to proceed swap system to update-erased state */
+ ret = FlashEraseSector(pSSDConfig, addr + (pSSDConfig->PFlashBlockSize >> 1), FTFx_PSECTOR_SIZE, \
+ pFlashCommandSequence);
+ if (FTFx_OK == ret)
+ {
+ /* Now the swap state must be Update-Erased, so report current swap state */
+ ret = PFlashSwapCtl(pSSDConfig,addr,FTFx_SWAP_REPORT_STATUS,¤tSwapMode, \
+ ¤tSwapBlockStatus, &nextSwapBlockStatus , pFlashCommandSequence);
+ }
+ }
+ /* If current swap mode is Update or Update-Erased */
+ if (FTFx_SWAP_UPDATE_ERASED == currentSwapMode)
+ {
+ if (NULL_SWAP_CALLBACK == pSwapCallback)
+ {
+ swapContinue = TRUE;
+ }
+ else
+ {
+ swapContinue = pSwapCallback(currentSwapMode);
+ }
+
+ if (swapContinue)
+ {
+ /* Progress Swap to COMPLETE State */
+ ret = PFlashSwapCtl(pSSDConfig,addr,FTFx_SWAP_SET_IN_COMPLETE,¤tSwapMode, \
+ ¤tSwapBlockStatus, &nextSwapBlockStatus , pFlashCommandSequence);
+ }
+ }
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+#endif /* End of SWAP_M */
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/PFlashSwapCtl.c b/plan_manage_main/src/drivers/FTFx/source/PFlashSwapCtl.c
new file mode 100644
index 0000000..e367839
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/PFlashSwapCtl.c
@@ -0,0 +1,128 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : PFlashSwap.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+#ifdef SWAP_M
+/************************************************************************
+*
+* Function Name : PFlashSwapCtl
+* Description : Execute swap command represented by a control code
+*
+* Arguments : PFLASH_SSD_CONFIG, uint32_t, uint8_t,
+* uint8_t* pCurrentSwapMode,uint8_t* pCurrentSwapBlockStatus,
+* uint8_t* pNextSwapBlockStatus,
+* pFLASHCOMMANDSEQUENCE
+*
+* Return Value : uint32_t
+*
+*************************************************************************/
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* end of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION PFlashSwapCtl(PFLASH_SSD_CONFIG pSSDConfig,uint32_t addr, uint8_t swapcmd,uint8_t* pCurrentSwapMode, \
+ uint8_t* pCurrentSwapBlockStatus, \
+ uint8_t* pNextSwapBlockStatus, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+ uint32_t ret; /* Return code variable */
+ uint32_t temp; /* temporary variable */
+
+ addr = WORD2BYTE(addr - pSSDConfig->PFlashBlockBase);
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp, FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_PFLASH_SWAP);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, GET_BIT_16_23(addr));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB2_OFFSET;
+ REG_WRITE(temp, GET_BIT_8_15(addr));
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB3_OFFSET;
+ REG_WRITE(temp, GET_BIT_0_7(addr));
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB4_OFFSET;
+ REG_WRITE(temp, swapcmd);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB5_OFFSET;
+ REG_WRITE(temp, 0xFFU);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB6_OFFSET;
+ REG_WRITE(temp, 0xFFU);
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB7_OFFSET;
+ REG_WRITE(temp, 0xFFU);
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+
+ if (FTFx_OK == ret)
+ {
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB5_OFFSET;
+ *pCurrentSwapMode = REG_READ(temp);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB6_OFFSET;
+ *pCurrentSwapBlockStatus = REG_READ(temp);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB7_OFFSET;
+ *pNextSwapBlockStatus = REG_READ(temp);
+ }
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+ return (ret);
+}
+#endif /* End of SWAP_M */
+/* End of file */
diff --git a/plan_manage_main/src/drivers/FTFx/source/SetEEEEnable.c b/plan_manage_main/src/drivers/FTFx/source/SetEEEEnable.c
new file mode 100644
index 0000000..edd6266
--- /dev/null
+++ b/plan_manage_main/src/drivers/FTFx/source/SetEEEEnable.c
@@ -0,0 +1,100 @@
+/*****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+******************************************************************************
+
+******************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SetEEEEnable.c *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : b39392@freescale.com *
+* *
+******************************************************************************/
+
+/************************** CHANGES ******************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Optimize code
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add uint32_t temp variable
+1.0.3 10.10.2014 FPT Team Add compile switching for C90TFS_ENABLE_DEBUG
+******************************************************************************/
+/* include the header files */
+#include "SSD_FTFx.h"
+
+/************************************************************************
+*
+* Function Name : SetEEEEnable.c
+* Description : This function is used to change the function of
+* the EERAM. When not partitioned for EEE, the EERAM
+* is typically used as traditional RAM. When partitioned
+* for EEE, the EERAM is typically used to store EEE data.
+* Arguments : PFLASH_SSD_CONFIG, uint8_t
+* Return Value : uint32_t
+*
+*************************************************************************/
+#if (DEBLOCK_SIZE != 0x0U)
+
+/* Enable size optimization */
+#if(ARM_CORTEX_M != CPU_CORE)
+#pragma optimize_for_size on
+#pragma optimization_level 4
+#endif /* end of CPU_CORE */
+
+uint32_t SIZE_OPTIMIZATION SetEEEEnable(PFLASH_SSD_CONFIG pSSDConfig, uint8_t EEEEnable, pFLASHCOMMANDSEQUENCE pFlashCommandSequence)
+{
+
+ uint32_t ret; /* return code variable */
+ uint32_t temp; /* temporary variable */
+
+ /* clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear*/
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
+ REG_WRITE(temp,FTFx_SSD_FSTAT_ERROR_BITS);
+
+ /* passing parameter to the command */
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB0_OFFSET;
+ REG_WRITE(temp, FTFx_SET_EERAM);
+
+ temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCCOB1_OFFSET;
+ REG_WRITE(temp, EEEEnable);
+
+ /* calling flash command sequence function to execute the command */
+ ret = pFlashCommandSequence(pSSDConfig);
+
+#if C90TFS_ENABLE_DEBUG
+ /* Enter Debug state if enabled */
+ if (TRUE == (pSSDConfig->DebugEnable))
+ {
+ ENTER_DEBUG_MODE;
+ }
+#endif
+
+ return(ret);
+}
+#endif /* End of DEBLOCK_SIZE*/
+/* End of file */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_CX_(128_64_32)K_32K_2K_1K_1K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_CX_(128_64_32)K_32K_2K_1K_1K.h
new file mode 100644
index 0000000..0190505
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_CX_(128_64_32)K_32K_2K_1K_1K.h
@@ -0,0 +1,203 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_CX_(128_64_32)K_32K_2K_1K_1K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update to support
+ FTFx_JX_256K_32K_2K_1K_1K
+ FTFx_JX_64K_32K_2K_1K_1K
+ Update prototype for FlashReadResource(), FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Use common file for 128K/64K and 32K Pflash
+ Remove declaration for swap functions since this
+ derivative has no swap.
+ Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 11.27.2013 FPT Team Modify define macros for checking alignment
+ of a function
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_CX_128_64_32K_32K_2K_1K_1K_H_
+#define _FTFx_CX_128_64_32K_32K_2K_1K_1K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for CX_128_64_32K_32K_2K_1K_1K
+ * @{
+ */
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS BIG_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE COLDFIRE
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00008000U /* 32 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00008000U
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0x00006000U
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0x00004000U
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00000000U
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0x00002000U
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0x00004000U
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00008000U /* Default value */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a function */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program/Verify section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Program/Verify section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_CX_128_64_32K_32K_2K_1K_1K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_CX_256K_32K_2K_1K_1K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_CX_256K_32K_2K_1K_1K.h
new file mode 100644
index 0000000..ada8d73
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_CX_256K_32K_2K_1K_1K.h
@@ -0,0 +1,205 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_CX_256_32K_2K_1K_1K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *****************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update to support
+ FTFx_JX_256K_32K_2K_1K_1K
+ FTFx_JX_64K_32K_2K_1K_1K
+ Update prototype for FlashReadResource(), FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Use separate file for 256K Pflash to support JG
+ Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros for checking alignment of a function
+1.0.1 01.16.2014 FPT Team Change prototype of PFlashSwapCtl function
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+******************************************************************************/
+
+#ifndef _FTFx_CX_256K_32K_2K_1K_1K_H_
+#define _FTFx_CX_256K_32K_2K_1K_1K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for CX_256_32K_2K_1K_1K
+ * @{
+ */
+
+/*! @brief swap feature is available in this derivative */
+#define SWAP_M
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS BIG_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE COLDFIRE
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00008000U /* 32 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00008000U
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0x00006000U
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0x00004000U
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00000000U
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0x00002000U
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0x00004000U
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00008000U /* Default value */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a function */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program/Verify section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Program/Verify section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash swap command address alignment */
+#define SWAP_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash write unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+/*! @}*/
+#endif /* _FTFx_CX_256K_32K_2K_1K_1K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K.h
new file mode 100644
index 0000000..e8aaed3
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K.h
@@ -0,0 +1,199 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *****************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 11.27.2013 FPT Team Modify define macros for checking alignment
+ of a function
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*****************************************************************************/
+
+#ifndef _FTFx_DX_256_128_96_64K_32K_2K_2K_1K_H_
+#define _FTFx_DX_256_128_96_64K_32K_2K_2K_1K_H_
+
+#include "SSD_FTFx_common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for DX_256_128_96_64K_32K_2K_2K_1K
+ * @{
+ */
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) ((x)>>1)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) ((x)<<1)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE DSC_56800EX
+/* Kinetis CPU */
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00008000U /* 32 KB size */
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00000000U
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00008000U
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0x00006000U
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0x00004000U
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00000000U
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0x00002000U
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0x00004000U
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00008000U /* Default value */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program/Verify section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Program/Verify section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash write unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K.h
new file mode 100644
index 0000000..d03d760
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K.h
@@ -0,0 +1,111 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *****************************************
+0.0.1 08.07.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros for checking alignment
+ of a function
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*****************************************************************************/
+
+#ifndef _FTFx_DX_64_48_32_16K_0K_0K_1K_0K_H_
+#define _FTFx_DX_64_48_32_16K_0K_0K_1K_0K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for DX_64_48_32_16K_0K_0K_1K_0K
+ * @{
+ */
+
+/*! @brief this is FTFA module, so some commands are not available */
+#define FTFA_M
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) ((x)>>1)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) ((x)<<1)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE DSC_56800EX
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00000000U /* 0 KB size */
+
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+/*! @}*/
+#endif /* _FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(128_64_32)K_0K_2K_1K_0K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(128_64_32)K_0K_2K_1K_0K.h
new file mode 100644
index 0000000..a353201
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(128_64_32)K_0K_2K_1K_0K.h
@@ -0,0 +1,114 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(128_64_32)K_0K_2K_1K_0K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_128_64_32K_0K_2K_1K_0K_H_
+#define _FTFx_KX_128_64_32K_0K_2K_1K_0K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_128_64_32K_0K_2K_1K_0K
+ * @{
+ */
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00000000U /* 0 KB size */
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash erase block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+
+#define PERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program secton command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+/*! @}*/
+#endif /* _FTFx_KX_(128_64_32)K_0K_2K_1K_0K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(128_64_32)K_32K_2K_1K_1K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(128_64_32)K_32K_2K_1K_1K.h
new file mode 100644
index 0000000..6637c32
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(128_64_32)K_32K_2K_1K_1K.h
@@ -0,0 +1,197 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(128_64_32)K_32K_2K_1K_1K.h *
+* DATE : Oct 10, 2014 *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_128_64_32K_32K_2K_1K_1K_H_
+#define _FTFx_KX_128_64_32K_32K_2K_1K_1K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_128_64_32K_32K_2K_1K_1K
+ * @{
+ */
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00008000U /* 32 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00008000U
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0x00006000U
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0x00004000U
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00000000U
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0x00002000U
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0x00004000U
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00008000U /* Default value */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a function */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_(128_64_32)K_32K_2K_1K_1K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128)K_64K_4K_2K_2K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128)K_64K_4K_2K_2K.h
new file mode 100644
index 0000000..d8b7dbd
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128)K_64K_4K_2K_2K.h
@@ -0,0 +1,193 @@
+/****************************************************************************
+ (c) Copyright 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_256_128K_64K_4K_2K_2K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.1.0 03.16.2013 FPT Team Initial Version
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_256_128K_64K_4K_2K_2K_H_
+#define _FTFx_KX_256_128K_64K_4K_2K_2K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_256_128K_64K_4K_2K_2K
+ * @{
+ */
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00010000U /* 64 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00001000U
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00010000U
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00008000U
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0x00000000U
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0x00010000U
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00010000U /* Default value */
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a function */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of erase block on PFlash function */
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of erase block on DFlash function */
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of erase sector on PFlash function */
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of erase sector on DFlash function */
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of program section on PFlash function */
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of program section on DFlash function */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of verify block on PFlash function */
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of verify block on PFlash function */
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of verify section on PFlash function */
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of verify section on DFlash function */
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of program check function */
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of read resource function */
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_(256_128)K_64K_4K_2K_2K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64)K_0K_0K_4K_0K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64)K_0K_0K_4K_0K.h
new file mode 100644
index 0000000..d7013f2
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64)K_0K_0K_4K_0K.h
@@ -0,0 +1,100 @@
+/****************************************************************************
+ (c) Copyright 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(256_128_64)K_0K_0K_4K_0K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+1.0.0 07.09.2014 FPT Team Initial version for Torq Silver
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_256_128K_64K_0K_0K_4K_0K_H_
+#define _FTFx_KX_256_128K_64K_0K_0K_4K_0K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_256_128K_64K_0K_0K_4K
+ * @{
+ */
+
+/*! @brief this is FTFA module, so some commands are not available */
+#define FTFA_M
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00001000U /* 4 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00000000U /* 0 KB size */
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000400U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+/*! @}*/
+#endif /* _FTFx_KX_256_128K_64K_0K_0K_4K_0K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h
new file mode 100644
index 0000000..0af4467
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h
@@ -0,0 +1,197 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 11.27.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_256_128_64K_32K_2K_2K_1K_H_
+#define _FTFx_KX_256_128_64K_32K_2K_2K_1K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_256_128_64K_32K_2K_2K_1K
+ * @{
+ */
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00008000U /* 32 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00000000U
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00008000U
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0x00006000U
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0x00004000U
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00000000U
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0x00002000U
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0x00004000U
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00008000U /* Default value */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a function */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_(128_64_32)K_32K_2K_1K_1K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h
new file mode 100644
index 0000000..7000232
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h
@@ -0,0 +1,116 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 11.27.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM0PLUS to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_256_128_64_32_16_8K_0K_0K_1K_0K_H_
+#define _FTFx_KX_256_128_64_32_16_8K_0K_0K_1K_0K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_256_128_64_32_16_8K_0K_0K_1K_0K
+ * @{
+ */
+
+/*! @brief this is FTFA module, so some commands are not available */
+#define FTFA_M
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000400U /* 1 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00000000U /* 0 KB size */
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+/*! @}*/
+#endif /* _FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(512_256)K_0K_4K_2K_0K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(512_256)K_0K_4K_2K_0K.h
new file mode 100644
index 0000000..c4325f5
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(512_256)K_0K_4K_2K_0K.h
@@ -0,0 +1,122 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(512_256)K_0K_4K_2K_0K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update to support
+ FTFx_KX_512K_0K_4K_2K_0K
+ Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.1 01.16.2014 FPT Team Change prototype of PFlashSwapCtl function
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_512_256K_0K_4K_2K_0K_H_
+#define _FTFx_KX_512_256K_0K_4K_2K_0K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for 512_256K_0K_4K_2K_0K
+ * @{
+ */
+
+/* This should let the user define */
+/*! @brief swap feature is available in this derivative */
+#define SWAP_M
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00000000U /* 0 KB size */
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of erase block function */
+/*! @brief P-Flash erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of erase sector on PFlash function */
+/*! @brief P-Flash program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of program section on PFlash function */
+/*! @brief P-Flash read 1s block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of verify block function */
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of verify section on PFlash function */
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of program check function */
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE /* check align of read resource function */
+/*! @brief P-Flaash swap command address alignment */
+#define SWAP_ALIGN_SIZE FTFx_PHRASE_SIZE /* check align of swap function*/
+
+/*! @brief P-Flash write unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+/*! @}*/
+#endif /* _FTFx_KX_512_256K_0K_4K_2K_0K_H_ */
+
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(512_256_128_64)K_0K_0K_2K_0K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(512_256_128_64)K_0K_0K_2K_0K.h
new file mode 100644
index 0000000..cbe60c7
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_(512_256_128_64)K_0K_0K_2K_0K.h
@@ -0,0 +1,111 @@
+/****************************************************************************
+ (c) Copyright 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_(512_256_128)K_0K_0K_2K_0K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+1.0.0 11.25.2013 FPT Team Initial version for Senna
+ based on FTFx_KX_(512_256)K_0K_0K_1K_0K.h
+1.0.1 01.16.2014 FPT Team Change prototype of PFlashSwapCtl function
+1.0.2 01.16.2014 FPT Team Change prototype of PFlashSwapCtl function
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypes for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_512_256_128K_0K_0K_2K_0K_H_
+#define _FTFx_KX_512_256_128K_0K_0K_2K_0K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_512_256_128K_0K_0K_2K_0K
+ * @{
+ */
+
+/*! @brief this is FTFA module, so some commands are not available */
+#define FTFA_M
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00000000U /* 0 KB size */
+
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+
+/*! @brief P-Flash read 1s block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+/*! @}*/
+#endif /* _FTFx_KX_512_256_128K_0K_0K_2K_0K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_1024K_256K_4K_4K_4K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_1024K_256K_4K_4K_4K.h
new file mode 100644
index 0000000..043a9e8
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_1024K_256K_4K_4K_4K.h
@@ -0,0 +1,203 @@
+/****************************************************************************
+ (c) Copyright 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_1024_256K_4K_4K_4K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.1.0 03.16.2013 FPT Team Initial Version
+0.1.1 06.05.2013 FPT Team Add define FTFE
+ Correct RDRSRC_SIZE = 8 (instead of 4).
+0.1.2 06.20.2013 FPT Team Remove declaration for swap functions since this
+ derivative has no swap.
+ Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_1024_256K_4K_4K_4K_H_
+#define _FTFx_KX_1024_256K_4K_4K_4K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_1024_256K_4K_4K_4K
+ * @{
+ */
+/*! @brief this is FTFE module */
+#define FTFE_M
+
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00001000U /* 4 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00001000U /* 4 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00040000U /* 256 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00001000U /* 4096 bytes */
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U /* 2048 bytes */
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U /* 1024 bytes */
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U /* 512 bytes */
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U /* 256 bytes */
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U /* 128 bytes */
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U /* 64 bytes */
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U /* 32 bytes */
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* 0 byte */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00040000U /* 256 KB */
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00038000U /* 224 KB */
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0x00030000U /* 192 KB */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0x00020000U /* 128 KB */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0x00000000U /* 0 KB */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U /* 0 KB */
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U /* 32 KB */
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0x00010000U /* 64 KB */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0x00020000U /* 128 KB */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0x00040000U /* 256 KB */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00040000U /* 256 KB */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8003F8U
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000400U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000400U
+
+
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief P-Flash swap command address alignment */
+#define SWAP_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_PHRASE_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_FTFx_KX_1024_256K_4K_4K_4K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_128K_128K_4K_2K_2K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_128K_128K_4K_2K_2K.h
new file mode 100644
index 0000000..437a487
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_128K_128K_4K_2K_2K.h
@@ -0,0 +1,191 @@
+/****************************************************************************
+ (c) Copyright 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_128K_128K_4K_2K_2K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.1.0 07.10.2013 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_128K_128K_4K_2K_2K_H_
+#define _FTFx_KX_128K_128K_4K_2K_2K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_128K_128K_4K_2K_2K
+ * @{
+ */
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00020000U /* 128 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00001000U
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* 0 byte */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00020000U /* 128K */
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00018000U /* 96K */
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0x00010000U /* 64K */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0x00000000U /* 0K */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U /* 0K */
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0x00004000U /* 16K */
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U /* 32K */
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0x00010000U /* 64K */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0x00020000U /* 128K */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00020000U /* Default value */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_128K_128K_4K_2K_2K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_256K_256K_4K_2K_2K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_256K_256K_4K_2K_2K.h
new file mode 100644
index 0000000..365e793
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_256K_256K_4K_2K_2K.h
@@ -0,0 +1,197 @@
+/****************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_256K_256K_4K_2K_2K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_256K_256K_4K_2K_2K_H_
+#define _FTFx_KX_256K_256K_4K_2K_2K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_256K_256K_4K_2K_2K
+ * @{
+ */
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00000800U /* 2 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00040000U /* 256 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00001000U
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00040000U
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0x0003C000U
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00038000U
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0x00030000U
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0x00020000U
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0x00000000U
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0x00004000U
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0x00010000U
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0x00020000U
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0x00040000U
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00040000U /* Default value */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8000FCU
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000100U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000100U
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_LONGWORD_SIZE
+
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_LONGWORD_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_256K_256K_4K_2K_2K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_512K_128K_4K_4K_4K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_512K_128K_4K_4K_4K.h
new file mode 100644
index 0000000..9be73f2
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_512K_128K_4K_4K_4K.h
@@ -0,0 +1,203 @@
+/****************************************************************************
+ (c) Copyright 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_512K_128K_4K_4K_4K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.1.0 03.16.2013 FPT Team Initial Version
+0.1.1 06.05.2013 FPT Team Add define FTFE
+ Correct RDRSRC_SIZE = 8 (instead of 4).
+0.1.2 06.20.2013 FPT Team Remove declaration for swap functions since this
+ derivative has no swap.
+ Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_512K_128K_4K_4K_4K_H_
+#define _FTFx_KX_512K_128K_4K_4K_4K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_512K_128K_4K_4K_4K
+ * @{
+ */
+ /*! @brief this is FTFE module */
+ #define FTFE_M
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00001000U /* 4 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00001000U /* 4 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00020000U /* 128 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0000 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00001000U /* 4096 bytes */
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U /* 2048 bytes */
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U /* 1024 bytes */
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U /* 512 bytes */
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U /* 256 bytes */
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U /* 128 bytes */
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U /* 64 bytes */
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U /* 32 bytes */
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* Default value */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00020000U /* 128 KB */
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0x00018000U /* 96 KB */
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0x00010000U /* 64 KB */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0x00000000U /* 0 KB */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U /* 0 KB */
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0x00008000U /* 32 KB */
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0x00010000U /* 64 KB */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0x00020000U /* 128 KB */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00020000U /* 128 KB */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8003F8U
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000400U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000400U
+
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief P-Flash swap command address alignment */
+#define SWAP_ALIGN_SIZE FTFx_DPHRASE_SIZE
+
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_PHRASE_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_512K_128K_4K_4K_4K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_512K_512K_16K_4K_4K.h b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_512K_512K_16K_4K_4K.h
new file mode 100644
index 0000000..0e41c0b
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/FTFx_KX_512K_512K_16K_4K_4K.h
@@ -0,0 +1,205 @@
+/************************************************************************
+ (c) Copyright 2012-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : FTFx_KX_512K_512K_16K_4K_4K.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.19.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update prototype for FlashReadResource(),
+ FlashProgramLongword() functions.
+ Add new macros and remove unnecessary ones.
+ Add FlashLaunchCommand() prototype.
+0.1.1 06.20.2013 FPT Team Update function prototype of
+ FlashProgramCheck by removing pFailData
+1.0.0 12.25.2013 FPT Team Modify define macros
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Delete function prototypeS for Flash SSD
+ Change define ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+
+#ifndef _FTFx_KX_512K_512K_16K_4K_4K_H_
+#define _FTFx_KX_512K_512K_16K_4K_4K_H_
+
+#include "SSD_FTFx_Common.h"
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name C90TFS Flash configuration for KX_512K_512K_16K_4K_4K
+ * @{
+ */
+/*! @brief this is FTFE module */
+#define FTFE_M
+ /*! @brief swap feature is available in this derivative */
+#define SWAP_M
+/*! @brief Convert from byte address to word(2 bytes) address */
+#define BYTE2WORD(x) (x)
+/*! @brief Convert from word(2 bytes) address to byte address */
+#define WORD2BYTE(x) (x)
+
+/*! @brief Endianness */
+#define ENDIANNESS LITTLE_ENDIAN
+
+/*! @brief cpu core */
+#define CPU_CORE ARM_CORTEX_M
+
+/*! @brief P-Flash sector size */
+#define FTFx_PSECTOR_SIZE 0x00001000U /* 4 KB size */
+/*! @brief D-Flash sector size */
+#define FTFx_DSECTOR_SIZE 0x00001000U /* 4 KB size */
+/*! @brief FlexNVM memory size */
+#define DEBLOCK_SIZE 0x00080000U /* 512 KB size */
+
+/*! @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+/* EEE Data Set Size Field Description */
+#define EEESIZE_0000 0x00004000U /* 16386 bytes */
+/*! @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0001 0x00002000U /* 8192 bytes */
+/*! @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0010 0x00001000U /* 4096 bytes */
+/*! @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0011 0x00000800U /* 2048 bytes */
+/*! @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0100 0x00000400U /* 1024 bytes */
+/*! @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0101 0x00000200U /* 512 bytes */
+/*! @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0110 0x00000100U /* 256 bytes */
+/*! @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_0111 0x00000080U /* 128 bytes */
+/*! @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1000 0x00000040U /* 64 bytes */
+/*! @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1001 0x00000020U /* 32 bytes */
+/*! @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1100 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1101 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1110 0xFFFFFFFFU /* Reserved */
+/*! @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFFFFFF = reserved) */
+#define EEESIZE_1111 0x00000000U /* 0 byte */
+
+/* D/E-Flash Partition Code Field Description */
+/*! @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0000 0x00080000U /* 512 KB */
+/*! @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0011 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0100 0x00070000U /* 448 KB */
+/*! @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0101 0x00060000U /* 384 KB */
+/*! @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0110 0x00040000U /* 256 KB */
+/*! @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_0111 0x00000000U /* 0 KB */
+/*! @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1000 0x00000000U /* 0 KB */
+/*! @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1001 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1010 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1011 0xFFFFFFFFU /* Reserved */
+/*! @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1100 0x00010000U /* 64 KB */
+/*! @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1101 0x00020000U /* 128 KB */
+/*! @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1110 0x00040000U /* 256 KB */
+/*! @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved) */
+#define DEPART_1111 0x00080000U /* 512 KB */
+
+/*! @brief Data flash IFR map */
+#define DFLASH_IFR_READRESOURCE_ADDRESS 0x8003F8U
+/* Address offset and size of PFlash IFR and DFlash IFR */
+/*! @brief Program flash IFR map offset */
+#define PFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Program flash IFR map size */
+#define PFLASH_IFR_SIZE 0x00000400U
+/*! @brief Data flash IFR map offset */
+#define DFLASH_IFR_OFFSET 0x00000000U
+/*! @brief Data flash IFR map size */
+#define DFLASH_IFR_SIZE 0x00000400U
+
+
+/* Size for checking alignment of a section */
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PERSBLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DERSBLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Erase sector command address alignment */
+#define PERSSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase sector command address alignment */
+#define DERSSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Program section command address alignment */
+#define PPGMSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Program section command address alignment */
+#define DPGMSEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash Erase/Read 1st block command address alignment */
+#define PRD1BLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM Erase/Read 1st block command address alignment */
+#define DRD1BLK_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief P-Flash read 1s section command address alignment */
+#define PRD1SEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief FlexNVM read 1s section command address alignment */
+#define DRD1SEC_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief Program check command address alignment */
+#define PGMCHK_ALIGN_SIZE FTFx_LONGWORD_SIZE
+/*! @brief Read resource command address alignment */
+#define RDRSRC_ALIGN_SIZE FTFx_PHRASE_SIZE
+/*! @brief P-Flash swap command address alignment */
+#define SWAP_ALIGN_SIZE FTFx_DPHRASE_SIZE
+/*! @brief Program unit size */
+#define PGM_SIZE_BYTE FTFx_PHRASE_SIZE
+/*! @brief Resume wait count used in FlashResume function */
+#define RESUME_WAIT_CNT 0x20U
+/*@}*/
+
+/*! @}*/
+#endif /* _FTFx_KX_512K_512K_16K_4K_4K_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx.h b/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx.h
new file mode 100644
index 0000000..136bee3
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx.h
@@ -0,0 +1,945 @@
+/****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SSD_FTFx.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+0.1.0 06.11.2010 FPT Team Finalize to 0.1.0
+0.1.1 08.16.2010 FPT Team Finalize to 0.1.1
+0.1.2 08.26.2010 FPT Team Finalize to 0.1.2
+0.1.3 09.16.2010 FPT Team Updated to support little Indian
+0.2.0 06.27.2010 FPT Team Finalize to 0.2.0
+0.2.1 01.28.2011 FPT Team Updated to support
+ FTFx_KX_512K_0K_0K,
+ FTFx_JX_128K_32K_2K,
+ and FTFx_FX_256K_32K_2K
+ derivatives.
+0.2.2 04.18.2011 FPT Team Add swap control code definitions
+ of FTFx_PFLASH_SWAP.
+0.2.3 09.15.2011 FPT Team Add command for program phrase
+0.2.4 03.16.2013 FPT Team Remove define Flash margin read settings
+ Add GETINDEX macro.
+1.0.0 12.25.2013 FPT Team Swap content of SSD_FTFx_Internal.h and SSD_FTFx.h to optimize include structure in c source file
+ Update to simplify including driver
+ header files for source files
+ Add definitions FTFx_SSD_FSTAT_ERROR_BITS
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add function Prototypes for Flash SSD
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+*************************************************************************/
+#ifndef _SSD_FTFx_INTERNAL_H_
+#define _SSD_FTFx_INTERNAL_H_
+
+#include "SSD_FTFx_Internal.h"
+
+#define FTFx_SSD_FSTAT_CCIF 0x80U
+#define FTFx_SSD_FSTAT_RDCOLERR 0x40U
+#define FTFx_SSD_FSTAT_ACCERR 0x20U
+#define FTFx_SSD_FSTAT_FPVIOL 0x10U
+#define FTFx_SSD_FSTAT_MGSTAT0 0x01U
+#define FTFx_SSD_FSTAT_ERROR_BITS (FTFx_SSD_FSTAT_ACCERR \
+ |FTFx_SSD_FSTAT_FPVIOL \
+ |FTFx_SSD_FSTAT_MGSTAT0)
+
+#define FTFx_SSD_FCNFG_CCIE 0x80U
+#define FTFx_SSD_FCNFG_RDCOLLIE 0x40U
+#define FTFx_SSD_FCNFG_ERSAREQ 0x20U
+#define FTFx_SSD_FCNFG_ERSSUSP 0x10U
+#define FTFx_SSD_FCNFG_RAMRDY 0x02U
+#define FTFx_SSD_FCNFG_EEERDY 0x01U
+
+#define FTFx_SSD_FSEC_KEYEN 0xC0U
+#define FTFx_SSD_FSEC_FSLACC 0x0CU
+#define FTFx_SSD_FSEC_SEC 0x03U
+
+/*--------------- FTFx Flash Module Memory Offset Map -----------------*/
+#if(BIG_ENDIAN == ENDIANNESS) /* Big Endian - coldfire CPU */
+ /* Flash Status Register (FSTAT)*/
+ #define FTFx_SSD_FSTAT_OFFSET 0x00000003U
+ /* Flash configuration register (FCNFG)*/
+ #define FTFx_SSD_FCNFG_OFFSET 0x00000002U
+ /* Flash security register (FSEC) */
+ #define FTFx_SSD_FSEC_OFFSET 0x00000001U
+ /* Flash Option Register (FOPT) */
+ #define FTFx_SSD_FOPT_OFFSET 0x00000000U
+ /* Flash common command object registers (FCCOB0-B) */
+ #define FTFx_SSD_FCCOB0_OFFSET 0x00000004U
+ #define FTFx_SSD_FCCOB1_OFFSET 0x00000005U
+ #define FTFx_SSD_FCCOB2_OFFSET 0x00000006U
+ #define FTFx_SSD_FCCOB3_OFFSET 0x00000007U
+ #define FTFx_SSD_FCCOB4_OFFSET 0x00000008U
+ #define FTFx_SSD_FCCOB5_OFFSET 0x00000009U
+ #define FTFx_SSD_FCCOB6_OFFSET 0x0000000AU
+ #define FTFx_SSD_FCCOB7_OFFSET 0x0000000BU
+ #define FTFx_SSD_FCCOB8_OFFSET 0x0000000CU
+ #define FTFx_SSD_FCCOB9_OFFSET 0x0000000DU
+ #define FTFx_SSD_FCCOBA_OFFSET 0x0000000EU
+ #define FTFx_SSD_FCCOBB_OFFSET 0x0000000FU
+ /* P-Flash protection registers (FPROT0-3) */
+ #define FTFx_SSD_FPROT0_OFFSET 0x00000010U
+ #define FTFx_SSD_FPROT1_OFFSET 0x00000011U
+ #define FTFx_SSD_FPROT2_OFFSET 0x00000012U
+ #define FTFx_SSD_FPROT3_OFFSET 0x00000013U
+ /* D-Flash protection registers (FDPROT) */
+ #define FTFx_SSD_FDPROT_OFFSET 0x00000014U
+ /* EERAM Protection Register (FEPROT) */
+ #define FTFx_SSD_FEPROT_OFFSET 0x00000015U
+
+#else /* Little Endian - kinetis CPU + Nevis2 CPU */
+ /* Flash Status Register (FSTAT)*/
+ #define FTFx_SSD_FSTAT_OFFSET 0x00000000U
+ /* Flash configuration register (FCNFG)*/
+ #define FTFx_SSD_FCNFG_OFFSET 0x00000001U
+ /* Flash security register (FSEC) */
+ #define FTFx_SSD_FSEC_OFFSET 0x00000002U
+ /* Flash Option Register (FOPT) */
+ #define FTFx_SSD_FOPT_OFFSET 0x00000003U
+ /* Flash common command object registers (FCCOB0-B) */
+ #define FTFx_SSD_FCCOB0_OFFSET 0x00000007U
+ #define FTFx_SSD_FCCOB1_OFFSET 0x00000006U
+ #define FTFx_SSD_FCCOB2_OFFSET 0x00000005U
+ #define FTFx_SSD_FCCOB3_OFFSET 0x00000004U
+ #define FTFx_SSD_FCCOB4_OFFSET 0x0000000BU
+ #define FTFx_SSD_FCCOB5_OFFSET 0x0000000AU
+ #define FTFx_SSD_FCCOB6_OFFSET 0x00000009U
+ #define FTFx_SSD_FCCOB7_OFFSET 0x00000008U
+ #define FTFx_SSD_FCCOB8_OFFSET 0x0000000FU
+ #define FTFx_SSD_FCCOB9_OFFSET 0x0000000EU
+ #define FTFx_SSD_FCCOBA_OFFSET 0x0000000DU
+ #define FTFx_SSD_FCCOBB_OFFSET 0x0000000CU
+ /* P-Flash protection registers (FPROT0-3) */
+ #define FTFx_SSD_FPROT0_OFFSET 0x00000013U
+ #define FTFx_SSD_FPROT1_OFFSET 0x00000012U
+ #define FTFx_SSD_FPROT2_OFFSET 0x00000011U
+ #define FTFx_SSD_FPROT3_OFFSET 0x00000010U
+ /* D-Flash protection registers (FDPROT) */
+ #define FTFx_SSD_FDPROT_OFFSET 0x00000017U
+ /* EERAM Protection Register (FEPROT) */
+ #define FTFx_SSD_FEPROT_OFFSET 0x00000016U
+#endif
+
+/* fccob offset address to store resource code */
+#if (PGM_SIZE_BYTE == FTFx_PHRASE_SIZE)
+ #define RSRC_CODE_OFSSET FTFx_SSD_FCCOB4_OFFSET
+#else
+ #define RSRC_CODE_OFSSET FTFx_SSD_FCCOB8_OFFSET
+#endif
+
+/*------------- Flash hardware algorithm operation commands -------------*/
+#define FTFx_VERIFY_BLOCK 0x00U
+#define FTFx_VERIFY_SECTION 0x01U
+#define FTFx_PROGRAM_CHECK 0x02U
+#define FTFx_READ_RESOURCE 0x03U
+#define FTFx_PROGRAM_LONGWORD 0x06U
+#define FTFx_PROGRAM_PHRASE 0x07U
+#define FTFx_ERASE_BLOCK 0x08U
+#define FTFx_ERASE_SECTOR 0x09U
+#define FTFx_PROGRAM_SECTION 0x0BU
+#define FTFx_VERIFY_ALL_BLOCK 0x40U
+#define FTFx_READ_ONCE 0x41U
+#define FTFx_PROGRAM_ONCE 0x43U
+#define FTFx_ERASE_ALL_BLOCK 0x44U
+#define FTFx_SECURITY_BY_PASS 0x45U
+#define FTFx_PFLASH_SWAP 0x46U
+#define FTFx_PROGRAM_PARTITION 0x80U
+#define FTFx_SET_EERAM 0x81U
+
+
+
+/* EERAM Function Control Code */
+#define EEE_ENABLE 0x00U
+#define EEE_DISABLE 0xFFU
+
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*!
+ * @name PFlash swap control codes
+ * @{
+ */
+/*! @brief Initialize Swap System control code */
+#define FTFx_SWAP_SET_INDICATOR_ADDR 0x01U
+/*! @brief Set Swap in Update State */
+#define FTFx_SWAP_SET_IN_PREPARE 0x02U
+/*! @brief Set Swap in Complete State */
+#define FTFx_SWAP_SET_IN_COMPLETE 0x04U
+/*! @brief Report Swap Status */
+#define FTFx_SWAP_REPORT_STATUS 0x08U
+
+/*@}*/
+
+/*!
+ * @name PFlash swap states
+ * @{
+ */
+/*! @brief Uninitialized swap mode */
+#define FTFx_SWAP_UNINIT 0x00U
+/*! @brief Ready swap mode */
+#define FTFx_SWAP_READY 0x01U
+/*! @brief Update swap mode */
+#define FTFx_SWAP_UPDATE 0x02U
+/*! @brief Update-Erased swap mode */
+#define FTFx_SWAP_UPDATE_ERASED 0x03U
+/*! @brief Complete swap mode */
+#define FTFx_SWAP_COMPLETE 0x04U
+
+/*@}*/
+
+/*------------------- Setting flash interrupt macro --------------------*/
+/*!
+* @brief Set the Flash interrupt enable bits in the FCNFG register
+*
+* @param ftfxRegBase: Specify register base address of flash module
+* @param value: The bit map value ( 0: disabled, 1 enabled) .
+* The numbering is marked from 0 to 7 where bit 0
+* is the least significant bit. Bit 7 is corresponding
+* to command complete interrupt. Bit 6 is corresponding
+* to read collision error interrupt.
+*/
+#define SET_FLASH_INT_BITS(ftfxRegBase, value) REG_WRITE((ftfxRegBase) + FTFx_SSD_FCNFG_OFFSET,\
+ ((value)&(FTFx_SSD_FCNFG_CCIE | FTFx_SSD_FCNFG_RDCOLLIE)))
+/*!
+* @brief Return the Flash interrupt enable bits in the FCNFG register
+*
+* @param ftfxRegBase: Specify register base address of flash module
+*/
+#define GET_FLASH_INT_BITS(ftfxRegBase) REG_READ((ftfxRegBase) + FTFx_SSD_FCNFG_OFFSET) &\
+ (FTFx_SSD_FCNFG_CCIE | FTFx_SSD_FCNFG_RDCOLLIE)
+
+/*!
+ * @name C90TFS Flash driver APIs
+ * @{
+ */
+
+/*---------------- Function Prototypes for Flash SSD --------------------*/
+/*!
+ * @brief Relocate a function to RAM address.
+ *
+ * This function provides users a facility to relocate a function from one location
+ * to another location in RAM.
+ *
+ * @param dest: Destination address where you want to place the function .
+ * @param size: Size of the function
+ * @param src: Address of the function will be relocated
+ * @return Relocated address of the function .
+ */
+extern uint32_t RelocateFunction(uint32_t dest, uint32_t size, uint32_t src);
+/*!
+ * @brief Flash initialization.
+ *
+ * This API will initialize flash module by clearing status error
+ * bit and reporting the memory configuration via SSD configuration structure.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t FlashInit(PFLASH_SSD_CONFIG pSSDConfig);
+
+/*!
+ * @brief Flash command sequence.
+ *
+ * This API is used to perform command write sequence on the flash.
+ * It is internal function, called by driver APIs only
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @return Successful completion (FTFx_OK)
+ * @return Failed in flash command execution (FTFx_ERR_ACCERR, FTFx_ERR_PVIOL,
+ * FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashCommandSequence(PFLASH_SSD_CONFIG pSSDConfig);
+/*!
+ * @brief P-Flash get protection.
+ *
+ * This API retrieves current P-Flash protection status. Considering
+ * the time consumption for getting protection is very low and even can
+ * be ignored, it is not necessary to utilize the Callback function to
+ * support the time-critical events.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param protectStatus: To return the current value of the P-Flash Protection.
+ * Each bit is corresponding
+ * to protection of 1/32 of the total P-Flash. The least
+ * significant bit is corresponding to the lowest
+ * address area of P-Flash. The most significant bit
+ * is corresponding to the highest address area of P-
+ * Flash and so on. There are two possible cases as below:
+ * - 0: this area is protected.
+ * - 1: this area is unprotected.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t PFlashGetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t* protectStatus);
+
+/*!
+ * @brief P-Flash set protection.
+ *
+ * This API sets the P-Flash protection to the intended protection status.
+ * Setting P-Flash protection status is subject to a protection transition
+ * restriction. If there is any setting violation, it will return
+ * an error code and the current protection status won’t be changed.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param protectStatus: The expected protect status user wants to set to
+ * P-Flash protection register. Each bit is corresponding
+ * to protection of 1/32 of the total P-Flash. The least
+ * significant bit is corresponding to the lowest
+ * address area of P-Flash. The most significant bit
+ * is corresponding to the highest address area of P-
+ * Flash and so on. There are two possible cases as below:
+ * - 0: this area is protected.
+ * - 1: this area is unprotected.
+ * @return Successful completion (FTFx_OK )
+ * @return Error value (FTFx_ERR_CHANGEPROT)
+ */
+extern uint32_t PFlashSetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t protectStatus);
+
+/*!
+ * @brief Flash get security state.
+ *
+ * This API retrieves the current Flash security status, including
+ * the security enabling state and the back door key enabling state.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param securityState: To return the current security status code.
+ * FLASH_NOT_SECURE (0x01): Flash currently not in secure state;
+ * FLASH_SECURE_BACKDOOR_ENABLED (0x02): Flash is secured and
+ * back door key access enabled;
+ * FLASH_SECURE_BACKDOOR_DISABLED (0x04): Flash is secured and
+ * back door key access disabled.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t FlashGetSecurityState(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* securityState);
+/*!
+ * @brief Flash security bypass.
+ *
+ * This API will unsecure the device by comparing the user's provided back
+ * door key with the ones in the Flash Configuration Field. If they are
+ * matched each other, then security will be released. Otherwise, an
+ * error code will be returned.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param keyBuffer: Point to the user buffer containing the back door key.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashSecurityBypass(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* keyBuffer, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*!
+ * @brief Flash erase all Blocks.
+ *
+ * This API will erase all Flash memory, initialize the FlexRAM, verify
+ * all memory contents, and then release MCU security
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_PVIOL, FTFx_ERR_MGSTAT0, FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashEraseAllBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*!
+ * @brief Flash verify all Blocks.
+ *
+ * This function will check to see if the P-Flash and/or D-Flash, EEPROM
+ * backup area, and D-Flash IFR have been erased to the specified read
+ * margin level, if applicable, and will release security if the readout passes
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param marginLevel: Read Margin Choice as follows:
+ * marginLevel = 0x0: use the Normal read level
+ * marginLevel = 0x1: use the User read
+ * marginLevel = 0x2: use the Factory read
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_MGSTAT0, FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashVerifyAllBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash erase sector.
+ *
+ * This API will erase one or more sectors in P-Flash or D-Flash memory.
+ * This API always returns FTFx_OK if size provided by user is
+ * zero regardless of the input validation.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Address in the first sector to be erased.
+ * @param size: Size to be erased in bytes. It is used to determine
+ * number of sectors to be erased.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_MGSTAT0, FTFx_ERR_ACCERR, FTFx_ERR_PVIOL,FTFx_ERR_SIZE)
+ */
+extern uint32_t FlashEraseSector(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash verify sector.
+ *
+ * This API will check to see if a section of P-Flash or D-Flash memory
+ * is erased to the specified read margin level
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended verify operation.
+ * @param number: Number of alignment unit to be verified. Refer to
+ * corresponding reference manual to get correct
+ * information of alignment constrain.
+ * @param marginLevel: Read Margin Choice as follows:
+ * marginLevel = 0x0: use Normal read level
+ * marginLevel = 0x1: use the User read
+ * marginLevel = 0x2: use the Factory read
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_MGSTAT0, FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashVerifySection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash erase suspend.
+ *
+ * This API is used to suspend a current operation of flash erase sector command.
+ * This function must be located in RAM memory or different flash blocks which are
+ * targeted for writing to avoid RWW error
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t FlashEraseSuspend(PFLASH_SSD_CONFIG pSSDConfig);
+/*!
+ * @brief Flash erase resume.
+ *
+ * This API is used to resume a previous suspended operation of flash erase sector command
+ * This function must be located in RAM memory or different flash blocks which are targeted
+ * for writing to avoid RWW error
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @return Successful completion (FTFx_OK)
+ */
+extern uint32_t FlashEraseResume(PFLASH_SSD_CONFIG pSSDConfig);
+/*!
+ * @brief Flash read once.
+ *
+ * This API is used to read out a reserved 64 byte field located in the P-Flash IFR via given number
+ * of record. Refer to corresponding reference manual to get correct value of this number.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param recordIndex: The record index will be read. It can be from 0x0
+ * to 0x7 or from 0x0 to 0xF according to specific derivative.
+ * @param pDataArray: Pointer to the array to return the data read by the read once command.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashReadOnce(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t recordIndex,\
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash program once.
+ *
+ * This API is used to program to a reserved 64 byte field located in the
+ * P-Flash IFR via given number of record. Refer to corresponding reference manual
+ * to get correct value of this number.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param recordIndex: The record index will be read. It can be from 0x0
+ * to 0x7 or from 0x0 to 0xF according to specific derivative.
+ * @param pDataArray: Pointer to the array from which data will be
+ * taken for program once command.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR,FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashProgramOnce(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t recordIndex,\
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash read resource.
+ *
+ * This API is used to read data from special purpose memory in flash memory module
+ * including P-Flash IFR, swap IFR, D-Flash IFR space and version ID.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended read operation.
+ * @param pDataArray: Pointer to the data returned by the read resource command.
+ * @param resourceSelectCode: Read resource select code:
+ * 0 : Flash IFR
+ * 1: Version ID
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR)
+ */
+extern uint32_t FlashReadResource(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t* pDataArray, \
+ uint8_t resourceSelectCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash program
+ *
+ * This API is used to program 4 consecutive bytes (for program long
+ * word command) and 8 consecutive bytes (for program phrase command) on
+ * P-flash or D-Flash block. This API always returns FTFx_OK if size
+ * provided by user is zero regardless of the input validation
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended program operation.
+ * @param size: Size in byte to be programmed
+ * @param pData: Pointer of source address from which data has to
+ * be taken for program operation.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_PVIOL, FTFx_ERR_SIZE, FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashProgram(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*!
+ * @brief Flash program check
+ *
+ * This API tests a previously programmed P-Flash or D-Flash long word
+ * to see if it reads correctly at the specified margin level. This
+ * API always returns FTFx_OK if size provided by user is zero
+ * regardless of the input validation
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended program check operation.
+ * @param size: Size in byte to check accuracy of program operation
+ * @param pExpectedData: The pointer to the expected data.
+ * @param pFailAddr: Returned the first aligned failing address.
+ * @param marginLevel: Read margin choice as follows:
+ * marginLevel = 0x1: read at User margin 1/0 level.
+ * marginLevel = 0x2: read at Factory margin 1/0 level.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashProgramCheck(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pExpectedData, \
+ uint32_t* pFailAddr, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*!
+ * @brief Calculate check sum
+ *
+ * This API will perform 32 bit sum of each byte data over specified flash
+ * memory range without carry, which provides rapid method for checking data integrity.
+ * The callback time period of this API is determined via FLASH_CALLBACK_CS macro in
+ * SSD_FTFx_Common.h which is used as a counter value for the CallBack() function calling in
+ * this API. This value can be changed as per the user requirement. User can change this value to
+ * obtain the maximum permissible callback time period.
+ * This API always returns FTFx_OK if size provided by user is zero regardless of the input
+ * validation.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address of the Flash range to be summed
+ * @param size: Size in byte of the flash range to be summed
+ * @param pSum: To return the sum value
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_RANGE)
+ */
+extern uint32_t FlashCheckSum(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint32_t* pSum);
+
+#ifndef FTFA_M
+/*!
+ * @brief Flash program section
+ *
+ * This API will program the data found in the Section Program Buffer
+ * to previously erased locations in the Flash memory. Data is preloaded into
+ * the Section Program Buffer by writing to the acceleration Ram and FlexRam
+ * while it is set to function as a RAM. The Section Program Buffer is limited
+ * to the value of FlexRam divides by a ratio. Refer to the associate reference
+ * manual to get correct value of this ratio.
+ * For derivatives including swap feature, the swap indicator address is encountered
+ * during FlashProgramSection, it is bypassed without setting FPVIOL but the content
+ * are not be programmed. In addition, the content of source data used to program to
+ * swap indicator will be re-initialized to 0xFF after completion of this command.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended program operation.
+ * @param number: Number of alignment unit to be programmed. Refer to associate
+ * reference manual to get correct value of this alignment constrain.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_PVIOL, FTFx_ERR_MGSTAT0, FTFx_ERR_RAMRDY)
+ */
+extern uint32_t FlashProgramSection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+#endif
+
+#if (!(defined(FTFA_M)) || (defined(BLOCK_COMMANDS)))
+/*!
+ * @brief Flash erase block
+ *
+ * This API will erase all addresses in an individual P-Flash or D-Flash block.
+ * For the derivatives including multiply logical P-Flash or D-Flash blocks,
+ * this API just erases a single block in a single call.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended erase operation.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_PVIOL, FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashEraseBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief Flash verify block
+ *
+ * This API will check to see if an entire P-Flash or D-Flash block has been
+ * erased to the specified margin level
+ * For the derivatives including multiply logical P-Flash or D-Flash blocks,
+ * this API just erases a single block in a single call.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended verify operation.
+ * @param marginLevel: Read Margin Choice as follows:
+ * marginLevel = 0x0: use Normal read level
+ * marginLevel = 0x1: use the User read
+ * marginLevel = 0x2: use the Factory read
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR, FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t FlashVerifyBlock(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+#endif
+
+#if (DEBLOCK_SIZE != 0x0U)
+/*!
+ * @brief EERAM get protection
+ *
+ * This API retrieves which EEPROM sections of FlexRAM are protected
+ * against program and erase operations. Considering the time consumption
+ * for getting protection is very low and even can be ignored, it is not necessary
+ * to utilize the Callback function to support the time-critical events
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param protectStatus: To return the current value of the EEPROM
+ * Protection Register. Each bit is corresponding to
+ * protection status of 1/8 of the total EEPROM
+ * use. The least significant bit is corresponding to
+ * the lowest address area of EEPROM. The most
+ * significant bit is corresponding to the highest
+ * address area of EEPROM and so on. There are
+ * two possible cases as below:
+ * - 0: this area is protected.
+ * - 1: this area is unprotected.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_NOEEE)
+ */
+extern uint32_t EERAMGetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* protectStatus);
+/*!
+ * @brief EERAM set protection
+ *
+ * This API sets protection to the intended protection status for EEPROM us
+ * area of FlexRam. This is subject to a protection transition restriction.
+ * If there is any setting violation, it will return failed information and
+ * the current protection status won’t be changed.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param protectStatus: The intended protection status value should be
+ * written to the EEPROM Protection Register.
+ * Each bit is corresponding to
+ * protection status of 1/8 of the total EEPROM
+ * use. The least significant bit is corresponding to
+ * the lowest address area of EEPROM. The most
+ * significant bit is corresponding to the highest
+ * address area of EEPROM and so on. There are
+ * two possible cases as below:
+ * - 0: this area is protected.
+ * - 1: this area is unprotected.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_NOEEE,FTFx_ERR_CHANGEPROT)
+ */
+extern uint32_t EERAMSetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t protectStatus);
+/*!
+ * @brief Flash Set EEEEnable
+ *
+ * This function is used to change the function of the FlexRAM. When not
+ * partitioned for EEPROM backup, the FlexRam is typically used as traditional
+ * RAM. Otherwise, the FlexRam is typically used to store EEPROM data and user
+ * can use this API to change its functionality according to his application requirement.
+ * For example, after partitioning to have EEPROM backup, FlexRAM is used for EEPROM
+ * use accordingly. And this API will be used to set FlexRAM is available for
+ * traditional RAM for FlashProgramSection() use.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param EEEEnable: FlexRam function control code. It can be:
+ * - 0xFF: make FlexRam available for RAM.
+ * - 0x00: make FlexRam available for EEPROM.
+ * @param pFlashCommandSequence : Pointer to the flash command sequence function.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_ACCERR)
+ */
+extern uint32_t SetEEEEnable(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEEnable,pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief EEPROM Emulator Write
+ *
+ * This API is used to write data to FlexRAM section which is artitioned
+ * as EEPROM use for EEPROM operation. Once data has been written to EEPROM
+ * use section of FlexRAM, the EEPROM file system will create new data record
+ * in EEPROM back-up area of FlexNVM in round-robin fashion.
+ * There is no alignment constraint for destination and size parameters
+ * provided by user. However, according to user’s input provided, this
+ * API will set priority to write to FlexRAM with following rules:
+ * 32-bit writing will be invoked if destination is 32 bit aligned and size
+ * is not less than 32 bits.
+ * 16-bit writing will be invoked if destination is 16 bit aligned and size
+ * is not less than 16 bits.
+ * 8-bit writing will be invoked if destination is 8 bit aligned and size is not less than 8 bits.
+ *
+ * @param pSSDConfig: The SSD configuration structure pointer.
+ * @param dest: Start address for the intended write operation.
+ * @param size: Size in byte to be written.
+ * @param pData: Pointer to source address from which data
+ * has to be taken for writing operation.
+ * @return Successful completion (FTFx_OK)
+ * @return Error value (FTFx_ERR_RANGE, FTFx_ERR_NOEEE, FTFx_ERR_PVIOL)
+ */
+extern uint32_t EEEWrite(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData);
+/*!
+ * @brief Flash D/E-Flash Partition.
+ *
+ * This API prepares the FlexNVM block for use as D-Flash, EEPROM backup or a combination
+ * of both and initializes the FlexRAM
+ *
+ * The single partition choice should be used through entire life time of a given
+ * application to guarantee the flash endurance and data retention of flash module.
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param EEEDataSizeCode EEPROM Data Size Code
+ * @param DEPartitionCode FlexNVM Partition Code
+ * @param pFlashCommandSequence Pointer to the flash command sequence function.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_ACCERR, FTFx_ERR_MGSTAT0)
+ */
+
+extern uint32_t DEFlashPartition(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEDataSizeCode, \
+ uint8_t DEPartitionCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief D-Flash get protection.
+ *
+ * This API retrieves current P-Flash protection status. Considering the time consumption
+ * for getting protection is very low and even can be ignored, it is not necessary to utilize
+ * the Callback function to support the time-critical events
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param protectStatus To return the current value of the D-Flash Protection
+ * Register. Each bit is corresponding to protection status
+ * of 1/8 of the total D-Flash. The least significant bit is
+ * corresponding to the lowest address area of D-Flash. The
+ * most significant bit is corresponding to the highest address
+ * area of D-Flash and so on. There are two possible cases as below:
+ * - 0 : this area is protected.
+ * - 1 : this area is unprotected.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_EFLASHONLY)
+ */
+extern uint32_t DFlashGetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* protectStatus);
+
+/*!
+ * @brief D-Flash set protection.
+ *
+ * This API sets the D-Flash protection to the intended protection status. Setting D-Flash
+ * protection status is subject to a protection transition restriction. If there is any setting
+ * violation, it will return failed information and the current protection status won’t be changed.
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param protectStatus The expected protect status user wants to set to D-Flash Protection
+ * Register. Each bit is corresponding to protection status
+ * of 1/8 of the total D-Flash. The least significant bit is
+ * corresponding to the lowest address area of D-Flash. The
+ * most significant bit is corresponding to the highest address
+ * area of D-Flash and so on. There are two possible cases as below:
+ * - 0 : this area is protected.
+ * - 1 : this area is unprotected.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_EFLASHONLY,FTFx_ERR_CHANGEPROT)
+ */
+extern uint32_t DFlashSetProtection(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t protectStatus);
+#endif /* End of DEBLOCK_SIZE */
+
+#ifdef SWAP_M
+/*!
+ * @brief swap between the two half of total logical P-Flash memory blocks within the memory map
+ *
+ * The swap API provides to user with an ability to interfere in a swap progress by letting the
+ * user code knows about the swap state in each phase of the process. This is done via pSwapCallBack()
+ * parameter. If user wants to stop at each intermediate swap state, just needs to set return value of
+ * this callback function to FALSE. If user wants to complete swap process within a single call, just
+ * needs to set return value of this function to TRUE.
+ *
+ * It is very important that user needs to erase the non-active swap indicator in somewhere of his
+ * application code or in within this swap call back function when swap system is in UPDATE state.
+ *
+ * In addition, if user does not want to use the swap call back parameter, just pass NULL_SWAP_CALLBACK
+ * as a null pointer. In a such situation, the PFlashSwap() will operate as in case setting return
+ * value of pSwapCallBack to TRUE and user does not need to care about erasing the non-active swap
+ * indicator when swap system is in UPDATE state.
+ *
+ * Below is an example to show how to implement a swap callback:
+ * @code
+ * bool PFlashSwapCallback(uint8_t currentSwapMode)
+ * {
+ * switch (currentSwapMode)
+ * {
+ * case FTFx_SWAP_UNINI:
+ * // Put your application-specific code here
+ * break;
+ * case FTFx_SWAP_READY:
+ * // Put your application-specific code here
+ * break;
+ * case FTFx_SWAP_UPDATE:
+ * // Put your application-specific code here (example: erase non-active swap indicator here)
+ * break;
+ * case FTFx_SWAP_UPDATE_ERASED:
+ * // Put your application-specific code here (example: erase non-active swap indicator here)
+ * break;
+ * case FTFx_SWAP_COMPLETE:
+ * // Put your application-specific code here
+ * break;
+ * default:
+ * break;
+ * }
+ * return TRUE; // Return FALSE to stop at intermediate swap state
+ *}
+ * @endcode
+ * The swap indicator provided by user must be within the lower half of P-Flash block but not in
+ * flash configuration area. If P-Flash block has two logical blocks, then swap indicator must be
+ * in P-Flash block 0. If P-Flash block has four logical blocks, then swap indicator can be in block
+ * 0 or block 1. Of course, it must not be in flash configuration field.
+ * User must use the same swap indicator for all swap control code except report swap status once
+ * swap system has been initialized. To refresh swap system to un-initialization state, just needs
+ * to use FlashEraseAllBlock() to clean up swap environment.
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param addr Address of swap indicator.
+ * @param pSwapCallback Callback to do specific task while the swapping is being performed
+ * @param pFlashCommandSequence Pointer to the flash command sequence function.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_ACCERR,FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t PFlashSwap(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t addr, \
+ PFLASH_SWAP_CALLBACK pSwapCallback, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*!
+ * @brief implements swap control command corresponding with swap control code provided via swapcmd parameter
+ *
+ * @param pSSDConfig The SSD configuration structure pointer
+ * @param addr Address of swap indicator.
+ * @param swapcmd Swap Control Code:
+ * 0x01 - Initialize Swap System
+ * 0x02 - Set Swap in Update State
+ * 0x04 - Set Swap in Complete Stat
+ * 0x08 - Report Swap Status
+ * @param pCurrentSwapMode Current Swap Mode:
+ * 0x00 - Uninitialized
+ * 0x01 - Ready
+ * 0x02 - Update
+ * 0x03 - Update-Erased
+ * 0x04 - Complete
+ * @param pCurrentSwapBlockStatus Current Swap Block Status indicates which program flash block
+ * is currently located at relative flash address 0x0_0000
+ * 0x00 - Program flash block 0
+ * 0x01 - Program flash block 1
+ * @param pNextSwapBlockStatus Next Swap Block Status indicates which program flash block
+ * will be located at relative flash address 0x0_0000 after the next reset.
+ * 0x00 - Program flash block 0
+ * 0x01 - Program flash block 1
+ * @param pFlashCommandSequence Pointer to the flash command sequence function.
+ *
+ * @return Successful completion(FTFx_OK)
+ * @return Error value(FTFx_ERR_ACCERR,FTFx_ERR_MGSTAT0)
+ */
+extern uint32_t PFlashSwapCtl(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t addr, \
+ uint8_t swapcmd, \
+ uint8_t* pCurrentSwapMode,\
+ uint8_t* pCurrentSwapBlockStatus, \
+ uint8_t* pNextSwapBlockStatus, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+#endif /* End of SWAP_M */
+/*@}*/
+
+/*! @}*/
+#endif /* _SSD_FTFx_INTERNAL_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx_Common.h b/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx_Common.h
new file mode 100644
index 0000000..2d7ab91
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx_Common.h
@@ -0,0 +1,424 @@
+/****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SSD_FTFx.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.20.2012 FPT Team Initial Version
+0.1.0 03.16.2013 FPT Team Update to support K20-512, K20-1M, L4K, LOPA,
+ L2KM and MCF51JG derivatives
+ Remove EERAMBlockSize field in ssdConfig
+0.1.1 06.10.2013 FPT Team Add to include "user_config.h" file
+0.1.2 06.11.2013 FPT Team Add derivative FTFx_JX_32K_32K_2K_1K_1K
+0.1.3 06.20.2013 FPT Team Add derivative FTFx_KX_256K_0K_4K_2K_0K
+ Remove derivative FTFx_KX_512K_0K_0K_2K_0K
+ Change derivative name as below:
+ - from FTFx_KX_32K_0K_0K_1K_0K to FTFx_KX_32K_0K_2K_1K_0K
+ - from FTFx_KX_64K_0K_0K_1K_0K to FTFx_KX_64K_0K_2K_1K_0K
+ - from FTFx_KX_128K_0K_0K_1K_0K to FTFx_KX_128K_0K_2K_1K_0K
+ Remove compiler definition CW and IAR
+ Add derivative for LKM family: FTFx_MX_64K_0K_0K_1K_0K
+ and FTFx_MX_128K_0K_0K_1K_0K
+ Remove FTFx_FX_256K_32K_2K_1K_1K
+ Change FTFx_JX_xxx to FTFx_CX_xxx for coldfire core.
+1.0.0 12.25.2013 FPT Team Add derivative FTFx_KX_512K_0K_0K_2K_0K
+ Add derivative FTFx_KX_256K_0K_0K_2K_0K
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+ Add derivative FTFx_KX_128K_0K_0K_2K_0K
+1.0.3 10.10.2014 FPT Team Add to support Doxygen; KV30, K60_2M and Torq Silver
+*************************************************************************/
+#ifndef _SSD_FTFx_COMMON_H_
+#define _SSD_FTFx_COMMON_H_
+
+#include "SSD_Types.h"
+
+/*------------------------- Configuration Macros -----------------------*/
+/* Define derivatives with rule: FTFx_AA_BB_CC_DD_EE_FF
+AA: MCU type
+BB: P-Flash block size
+CC: FlexNVM block size
+DD: FlexRAM/AccRam size
+EE: P-Flash sector size
+FF: D-Flash sector size */
+
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+/*!
+ * @name Supported flash configuration
+ * @{
+ */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 256K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 2K */
+#define FTFx_KX_256K_256K_4K_2K_2K 1 /* Kinetis - K40, K60 ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 512K, FlexNVM block size: 0K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_512K_0K_4K_2K_0K 2 /* Kinetis - K20, K40, K60 ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 512K, FlexNVM block size: 512K, FlexRAM/AccRam size: 16K, P-Flash sector size: 4K, FlexNVM sector size: 4K */
+#define FTFx_KX_512K_512K_16K_4K_4K 3 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 1024K, FlexNVM block size: 0K, FlexRAM/AccRam size: 16K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_1024K_0K_16K_4K_0K 4 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 32K, FlexNVM block size: 0K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_KX_32K_0K_2K_1K_0K 5 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 32K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_KX_32K_32K_2K_1K_1K 6 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_KX_64K_0K_2K_1K_0K 7 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_KX_64K_32K_2K_1K_1K 8 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_KX_128K_0K_2K_1K_0K 9 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size:128K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_KX_128K_32K_2K_1K_1K 10 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_KX_64K_32K_2K_2K_1K 11 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_KX_128K_32K_2K_2K_1K 12 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_KX_256K_32K_2K_2K_1K 13 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 1024K, FlexNVM block size: 0K, FlexRAM/AccRam size: 4K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_1024K_0K_4K_4K_0K 14 /* Kinetis - ARM Cortex M4 core - K20 1M*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 512K, FlexNVM block size: 128K, FlexRAM/AccRam size: 4K, P-Flash sector size: 4K, FlexNVM sector size: 4K */
+#define FTFx_KX_512K_128K_4K_4K_4K 15 /* Kinetis - ARM Cortex M4 core - K20 1M - 512*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 64K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 2K */
+#define FTFx_KX_256K_64K_4K_2K_2K 16 /* Kinetis - ARM Cortex M4 core - K20 256K*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 64K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 2K */
+#define FTFx_KX_128K_64K_4K_2K_2K 17 /* Kinetis - ARM Cortex M4 core - K20 128K*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 0K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_256K_0K_4K_2K_0K 18 /* Kinetis - K60 ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 128K, FlexRAM/AccRam size: 4K, P-Flash sector size: 2K, FlexNVM sector size: 2K */
+#define FTFx_KX_128K_128K_4K_2K_2K 19 /* Kinetis - ARM Cortex M4 core */
+/*! @brief MCU type: Nevis2, P-Flash block size: 256K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_NX_256K_32K_2K_2K_1K 20 /* Nevis2 - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Nevis2, P-Flash block size: 128K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_NX_128K_32K_2K_2K_1K 21 /* Nevis2 - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Nevis2, P-Flash block size: 96K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_NX_96K_32K_2K_2K_1K 22 /* Nevis2 - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Nevis2, P-Flash block size: 64K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 2K, FlexNVM sector size: 1K */
+#define FTFx_NX_64K_32K_2K_2K_1K 23 /* Nevis2 - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_128K_0K_0K_1K_0K 24 /* L2K - ARM Cortex M0 core */ /* L2KM, L4K*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_64K_0K_0K_1K_0K 25 /* L2K - ARM Cortex M0 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 32K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_32K_0K_0K_1K_0K 26 /* L2K & L1PT - ARM Cortex M0 core */ /* LOPA */
+/*! @brief MCU type: Kinetis, P-Flash block size: 16K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_16K_0K_0K_1K_0K 27 /* L1PT - ARM Cortex M0 core */ /* LOPA */
+/*! @brief MCU type: Kinetis, P-Flash block size: 8K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_8K_0K_0K_1K_0K 28 /* L1PT - ARM Cortex M0 core */ /* LOPA */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_LX_256K_0K_0K_1K_0K 29 /* L4K - ARM Cortex M0 core */
+/*! @brief MCU type: Anguilla Silever, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_AX_64K_0K_0K_1K_0K 30 /* Anguilla_Silver - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Anguilla Silever, P-Flash block size: 48K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_AX_48K_0K_0K_1K_0K 31 /* Anguilla_Silver - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Anguilla Silever, P-Flash block size: 62K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_AX_32K_0K_0K_1K_0K 32 /* Anguilla_Silver - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Anguilla Silever, P-Flash block size: 16K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_AX_16K_0K_0K_1K_0K 33 /* Anguilla_Silver - 56800EX 32 bit DSC core */
+/*! @brief MCU type: Coldfire, P-Flash block size: 128K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_CX_128K_32K_2K_1K_1K 34 /* ColdFire core, MCF51JF/JU 128K */
+/*! @brief MCU type: Coldfire, P-Flash block size: 64K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_CX_64K_32K_2K_1K_1K 35 /* ColdFire core, MCF51JF/JU 64K */
+/*! @brief MCU type: Coldfire, P-Flash block size: 32K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_CX_32K_32K_2K_1K_1K 36 /* ColdFire core, MCF51JF/JU 32K */
+/*! @brief MCU type: Coldfire, P-Flash block size: 256K, FlexNVM block size: 32K, FlexRAM/AccRam size: 2K, P-Flash sector size: 1K, FlexNVM sector size: 1K */
+#define FTFx_CX_256K_32K_2K_1K_1K 37 /* ColdFire core, MCF51JG256 , MCF51FD256*/
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_MX_64K_0K_0K_1K_0K 38 /* LKM34 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 1K, FlexNVM sector size: 0K */
+#define FTFx_MX_128K_0K_0K_1K_0K 39 /* LKM34 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 512K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_512K_0K_0K_2K_0K 40 /* Senna K22FN512 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_256K_0K_0K_2K_0K 41 /* Senna K22FN256 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_128K_0K_0K_2K_0K 42 /* KV30 MKV30F12810/ K02 MK02FN12810/K22FN128 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 2K, FlexNVM sector size: 0K */
+#define FTFx_KX_64K_0K_0K_2K_0K 43 /* KV30 MKV30F6410/ K02 MK02FN6410 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 256K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_256K_0K_0K_4K_0K 44 /* Torq Silver KV4F256 and K24s MK24F25612 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 128K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_128K_0K_0K_4K_0K 45 /* Torq Silver KV4F128 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 64K, FlexNVM block size: 0K, FlexRAM/AccRam size: 0K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_64K_0K_0K_4K_0K 46 /* Torq Silver KV4F64 */
+/*! @brief MCU type: Kinetis, P-Flash block size: 2048K, FlexNVM block size: 0K, FlexRAM/AccRam size: 4K, P-Flash sector size: 4K, FlexNVM sector size: 0K */
+#define FTFx_KX_2048K_0K_4K_4K_0K 47 /* Kinetis - K60_2M ARM Cortex M4 core */
+/*! @brief MCU type: Kinetis, P-Flash block size: 1024K, FlexNVM block size: 256K, FlexRAM/AccRam size: 4K, P-Flash sector size: 4K, FlexNVM sector size: 4K */
+#define FTFx_KX_1024K_256K_4K_4K_4K 48 /* Kinetis - ARM Cortex M4 core - K65/K66 */
+/*@}*/
+
+
+
+
+/* Endianness */
+/*!
+ * @name Endianness definition
+ * @{
+ */
+/*! @brief Big Endian */
+#define BIG_ENDIAN 0
+/*! @brief Little Endian */
+#define LITTLE_ENDIAN 1
+/*@}*/
+/*!
+ * @name CPU core types
+ * @{
+ */
+/*! @brief ColdFire core */
+#define COLDFIRE 0
+/*! @brief ARM Cortex M core */
+#define ARM_CORTEX_M 1
+/*! @brief DSC_56800EX core */
+#define DSC_56800EX 2
+/*@}*/
+/*!
+ * @name Size macro
+ * @{
+ */
+/*! @brief Word size */
+#define FTFx_WORD_SIZE 0x0002U /* 2 bytes */
+/*! @brief Longword size */
+#define FTFx_LONGWORD_SIZE 0x0004U /* 4 bytes */
+/*! @brief Phrase size */
+#define FTFx_PHRASE_SIZE 0x0008U /* 8 bytes */
+/*! @brief Double-phrase size */
+#define FTFx_DPHRASE_SIZE 0x0010U /* 16 bytes */
+
+/*@}*/
+
+/*! @}*/
+/* Flash security status */
+#define FLASH_SECURITY_STATE_KEYEN 0x80U
+#define FLASH_SECURITY_STATE_UNSECURED 0x02U
+
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+/*------------ Return Code Definition for FTFx SSD ---------------------*/
+/*!
+ * @name Return Code Definition for FTFx SSD
+ * @{
+ */
+/*! @brief Function executes successfully */
+#define FTFx_OK 0x0000U
+/*!@brief MGSTAT0 bit is set in the FSTAT register
+*
+* Possible causes:
+*
+* MGSTAT0 bit in FSTAT register is set. Refer to corresponding command description
+* of each API on reference manual to get detail reasons
+*
+* Solution:
+*
+* Hardware error
+*
+*/
+#define FTFx_ERR_MGSTAT0 0x0001U
+/*! @brief Protection violation is set in FSTAT register
+*
+* Possible causes:
+*
+* FPVIOL bit in FSTAT register is set. Refer to corresponding command description
+* of each API on reference manual to get detail reasons
+*
+* Solution:
+*
+* The flash location targeted to program/erase operation must be unprotected. Swap
+* indicator must not be programed/erased except in Update or Update-Erase state.
+*
+*/
+#define FTFx_ERR_PVIOL 0x0010U
+/*! @brief Access error is set in the FSTAT register
+*
+* Possible causes:
+*
+* ACCERR bit in FSTAT register is set. Refer to corresponding command description
+* of each API on reference manual to get detail reasons.
+*
+* Solution:
+*
+* Provide valid input parameters for each API according to specific flash module.
+*
+*/
+#define FTFx_ERR_ACCERR 0x0020U
+/*! @brief Can not change protection status
+*
+* Possible causes:
+*
+* Violate protection transition
+*
+* Solution:
+*
+* In NVM normal mode, protection size cannot be decreased. So, only increasing
+* protection size is permitted if the device is operating in this mode.
+*
+*/
+#define FTFx_ERR_CHANGEPROT 0x0100U
+/*! @brief FlexRAM is not set for EEPROM use
+*
+* Possible causes:
+*
+* User accesses to EEPROM operation but there is no EEPROM backup enabled.
+*
+* Solution:
+*
+* Need to enable EEPROM by partitioning FlexNVM to have EEPROM backup and/or
+* enable it by SetEEEnable API.
+*
+*/
+#define FTFx_ERR_NOEEE 0x0200U
+/*! @brief FlexNVM is set for full EEPROM backup
+*
+* Possible causes:
+*
+* User accesses to D-Flash operation but there is no D-Flash on FlexNVM.
+*
+* Solution:
+*
+* Need to partition FlexNVM to have D-Flash.
+*
+*/
+#define FTFx_ERR_EFLASHONLY 0x0400U
+/*! @brief Programming acceleration RAM is not available
+*
+* Possible causes:
+*
+* User invokes flash program section command but FlexRam is being set for EEPROM emulation.
+*
+* Solution:
+*
+* Need to set FlexRam as traditional Ram by SetEEEnable API.
+*
+*/
+#define FTFx_ERR_RAMRDY 0x0800U
+/*! @brief Address is out of the valid range
+*
+* Possible causes:
+*
+* The size or destination provided by user makes start address or end address
+* out of valid range.
+*
+* Solution:
+*
+* Make sure the destination and (destination + size) within valid address range.
+*
+*/
+#define FTFx_ERR_RANGE 0x1000U
+/*! @brief Misaligned size
+*
+* Possible causes:
+*
+* The size provided by user is misaligned.
+*
+* Solution:
+*
+* Size must be an aligned value according to specific constrain of each API.
+*
+*/
+#define FTFx_ERR_SIZE 0x2000U
+/*@}*/
+
+/*!
+ * @name Flash security status
+ * @{
+ */
+/*! @brief Flash currently not in secure state */
+#define FLASH_NOT_SECURE 0x01U
+/*! @brief Flash is secured and backdoor key access enabled */
+#define FLASH_SECURE_BACKDOOR_ENABLED 0x02U
+/*! @brief Flash is secured and backdoor key access disabled */
+#define FLASH_SECURE_BACKDOOR_DISABLED 0x04U
+/*@}*/
+
+/*! @}*/
+/*-------------- Read/Write/Set/Clear Operation Macros -----------------*/
+#define REG_BIT_SET(address, mask) (*(vuint8_t*)(address) |= (mask))
+#define REG_BIT_CLEAR(address, mask) (*(vuint8_t*)(address) &= ~(mask))
+#define REG_BIT_GET(address, mask) (*(vuint8_t *)(address) & (uint8_t)(mask))
+#define REG_WRITE(address, value) (*(vuint8_t*)(address) = (value))
+#define REG_READ(address) ((uint8_t)(*(vuint8_t*)(address)))
+#define REG_WRITE32(address, value) (*(vuint32_t*)(address) = (value))
+#define REG_READ32(address) ((uint32_t)(*(vuint32_t*)(address)))
+
+#define WRITE8(address, value) (*(vuint8_t*)(address) = (value))
+#define READ8(address) ((uint8_t)(*(vuint8_t*)(address)))
+#define SET8(address, value) (*(vuint8_t*)(address) |= (value))
+#define CLEAR8(address, value) (*(vuint8_t*)(address) &= ~(value))
+#define TEST8(address, value) (*(vuint8_t*)(address) & (value))
+
+#define WRITE16(address, value) (*(vuint16_t*)(address) = (value))
+#define READ16(address) ((uint16_t)(*(vuint16_t*)(address)))
+#define SET16(address, value) (*(vuint16_t*)(address) |= (value))
+#define CLEAR16(address, value) (*(vuint16_t*)(address) &= ~(value))
+#define TEST16(address, value) (*(vuint16_t*)(address) & (value))
+
+#define WRITE32(address, value) (*(vuint32_t*)(address) = (value))
+#define READ32(address) ((uint32_t)(*(vuint32_t*)(address)))
+#define SET32(address, value) (*(vuint32_t*)(address) |= (value))
+#define CLEAR32(address, value) (*(vuint32_t*)(address) &= ~(value))
+#define TEST32(address, value) (*(vuint32_t*)(address) & (value))
+
+#define GET_BIT_0_7(value) ((uint8_t)((value) & 0xFFU))
+#define GET_BIT_8_15(value) ((uint8_t)(((value)>>8) & 0xFFU))
+#define GET_BIT_16_23(value) ((uint8_t)(((value)>>16) & 0xFFU))
+#define GET_BIT_24_31(value) ((uint8_t)((value)>>24))
+
+/*--------------------- CallBack function period -----------------------*/
+#ifndef FLASH_CALLBACK_CS
+#define FLASH_CALLBACK_CS 0x0AU /* Check Sum */
+#endif
+
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+/*--------------------Null Callback function definition ----------------*/
+/*!
+ * @name Null Callback function definition
+ * @{
+ */
+/*! @brief Null callback */
+#define NULL_CALLBACK ((PCALLBACK)0xFFFFFFFF)
+/*! @brief Null swap callback */
+#define NULL_SWAP_CALLBACK ((PFLASH_SWAP_CALLBACK)0xFFFFFFFF)
+/*@}*/
+
+/*! @}*/
+#endif /* _SSD_FTFx_COMMON_H_ */
+
diff --git a/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx_Internal.h b/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx_Internal.h
new file mode 100644
index 0000000..63469c7
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/SSD_FTFx_Internal.h
@@ -0,0 +1,206 @@
+/****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SSD_FTFx.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+0.1.0 06.11.2010 FPT Team Finalize to 0.1.0
+0.1.1 08.16.2010 FPT Team Update some macros for
+ FTFx_KX_256K_256K_4K_2K_2K derivative
+0.1.2 08.26.2010 FPT Team Removed EEEBlockBase element in
+ _ssd_config structure,
+0.1.3 09.16.2010 FPT Team Updated some macros for
+ FTFx_KX_256K_256K_4K_2K_2K derivative
+0.2.0 09.27.2010 FPT Team Removed some macros that is not
+ used.
+0.2.1 01.28.2011 FPT Team Updated to support
+ FTFx_KX_512K_0K_0K_2K_0K,
+ FTFx_JX_128K_32K_2K_1K_1K,
+ and FTFx_FX_256K_32K_2K_1K_1K
+ derivatives.
+0.2.2 04.18.2011 FPT Team Add Swap state definitions of
+ FTFx_PFLASH_SWAP.
+0.2.2 09.15.2011 FPT Team Add FlashProgramPhrase
+ Add macros for K70
+ Remove unused macros
+0.2.3 11.15.2011 FPT Team Updated some macros for
+ FTFx_KX_1024K_0K_16K_4K_0K derivative.
+0.2.4 12.23.2011 FPT Team Update to support more Kinetis derivatives.
+0.2.5 04.26.2012 FPT Team Update to support swap in FTFx_KX_512K_0K_0K_2K_0K derivative
+ Add definition of NULL_SWAP_CALLBACK to
+ fix incompatible function type of null pointer bug in IAR compiler
+0.3.1 05.16.2012 FPT Team Update to support
+ FTFx_NX_256K_32K_2K_2K_1K
+ FTFx_NX_128K_32K_2K_2K_1K
+ FTFx_NX_96K_32K_2K_2K_1K
+ FTFx_NX_64K_32K_2K_2K_1K
+ derivatives
+ Change prototype of FlashReadOnce and FlashProgramOnce functions
+0.3.2 06.20.2012 FPT Team Update to support more L2K and L1PT derivatives.
+ Change format of SSD_FTFx.h
+0.3.3 08.10.2012 FPT Team Update to support Anguilla Silver derivatives
+0.3.4 03.16.2013 FPT Team Update to support K20-512, K20-1M, L4K, LOPA,
+ L2KM and MCF51JG derivatives
+ Remove user's defined macros to other file.
+ Add compiler error display
+0.3.5 06.10.2013 FPT Team Add PGM2DATA, DATA2PGM macros to support copying FlashLaunchCommand
+ RAM on DSC devices
+ Update derivative name according to the change on SSD_FTFx_Common.h
+ Change the prefix of common header file name as below:
+ - from L (L family) to K (Kinetis)
+ - from F (FD256) to C (Coldfire)
+ - from J (JF/JU) to C (Coldfire)
+ - from N (Nevis) to D (DSC)
+ - from A (AnguilaSiver) to D (DSC)
+1.0.0 12.25.2013 FPT Team Swap content of SSD_FTFx_Internal.h and SSD_FTFx.h to optimize include structure in c source file
+ Update to support Senna derivatives
+ Update to Enter debug mode use macro
+ Add definition READ16_ADV(addr) and READ32_ADV(addr)
+ to support Anguilla Silver and Nevis2 in EEEWrite function
+1.0.2 08.04.2014 FPT Team Update to follow SDK
+ convention(MISRA-C)
+ Delete define macros READ16_ADV and READ32_ADV
+ Change ARM_CM0PLUS and ARM_CM4 to ARM_CORTEX_M
+1.0.3 10.10.2014 FPT Team Add to support KV30, K60_2M and Torq Silver
+*************************************************************************/
+#ifndef _SSD_FTFx_H_
+#define _SSD_FTFx_H_
+
+#include "SSD_FTFx_Common.h"
+#include "user_cfg.h"
+
+
+#ifndef FLASH_DERIVATIVE
+#error"User needs to define FLASH_DERIVATIVE macro in user_cfg.h file"
+#endif
+
+#ifndef C90TFS_ENABLE_DEBUG
+ #define C90TFS_ENABLE_DEBUG 0
+#endif
+/* Select file .h for each derivatives */
+#if (FTFx_KX_256K_256K_4K_2K_2K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_256K_256K_4K_2K_2K.h"
+#elif (FTFx_KX_128K_128K_4K_2K_2K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_128K_128K_4K_2K_2K.h"
+#elif ((FTFx_KX_512K_0K_4K_2K_0K == FLASH_DERIVATIVE) || (FTFx_KX_256K_0K_4K_2K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(512_256)K_0K_4K_2K_0K.h"
+#elif (FTFx_CX_256K_32K_2K_1K_1K == FLASH_DERIVATIVE)
+ #include "FTFx_CX_256K_32K_2K_1K_1K.h"
+#elif ((FTFx_CX_128K_32K_2K_1K_1K == FLASH_DERIVATIVE) || (FTFx_CX_64K_32K_2K_1K_1K == FLASH_DERIVATIVE)\
+ || (FTFx_CX_32K_32K_2K_1K_1K == FLASH_DERIVATIVE))
+ #include "FTFx_CX_(128_64_32)K_32K_2K_1K_1K.h"
+#elif (FTFx_KX_512K_512K_16K_4K_4K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_512K_512K_16K_4K_4K.h"
+#elif ((FTFx_KX_1024K_0K_16K_4K_0K == FLASH_DERIVATIVE) || (FTFx_KX_1024K_0K_4K_4K_0K == FLASH_DERIVATIVE)\
+ || (FTFx_KX_2048K_0K_4K_4K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(2048_1024)K_0K_(16_4)K_4K_0K.h"
+#elif ((FTFx_KX_128K_0K_2K_1K_0K == FLASH_DERIVATIVE)||(FTFx_KX_64K_0K_2K_1K_0K == FLASH_DERIVATIVE)\
+ ||(FTFx_KX_32K_0K_2K_1K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(128_64_32)K_0K_2K_1K_0K.h"
+#elif ((FTFx_KX_128K_32K_2K_1K_1K == FLASH_DERIVATIVE)||(FTFx_KX_64K_32K_2K_1K_1K == FLASH_DERIVATIVE)\
+ ||(FTFx_KX_32K_32K_2K_1K_1K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(128_64_32)K_32K_2K_1K_1K.h"
+#elif ((FTFx_KX_256K_32K_2K_2K_1K == FLASH_DERIVATIVE)||(FTFx_KX_128K_32K_2K_2K_1K == FLASH_DERIVATIVE)\
+ ||(FTFx_KX_64K_32K_2K_2K_1K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(256_128_64)K_32K_2K_2K_1K.h"
+#elif ((FTFx_NX_256K_32K_2K_2K_1K == FLASH_DERIVATIVE)||(FTFx_NX_128K_32K_2K_2K_1K == FLASH_DERIVATIVE)\
+ ||(FTFx_NX_96K_32K_2K_2K_1K == FLASH_DERIVATIVE)||(FTFx_NX_64K_32K_2K_2K_1K == FLASH_DERIVATIVE))
+ #include "FTFx_DX_(256_128_96_64)K_32K_2K_2K_1K.h"
+#elif ((FTFx_LX_128K_0K_0K_1K_0K == FLASH_DERIVATIVE)||(FTFx_LX_64K_0K_0K_1K_0K == FLASH_DERIVATIVE)\
+ ||(FTFx_LX_32K_0K_0K_1K_0K == FLASH_DERIVATIVE)||(FTFx_LX_16K_0K_0K_1K_0K == FLASH_DERIVATIVE)\
+ ||(FTFx_LX_8K_0K_0K_1K_0K == FLASH_DERIVATIVE) || (FTFx_LX_256K_0K_0K_1K_0K == FLASH_DERIVATIVE)\
+ || (FTFx_MX_64K_0K_0K_1K_0K == FLASH_DERIVATIVE) || (FTFx_MX_128K_0K_0K_1K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(256_128_64_32_16_8)K_0K_0K_1K_0K.h"
+#elif ((FTFx_AX_64K_0K_0K_1K_0K == FLASH_DERIVATIVE)||(FTFx_AX_48K_0K_0K_1K_0K == FLASH_DERIVATIVE)\
+ ||(FTFx_AX_32K_0K_0K_1K_0K == FLASH_DERIVATIVE)||(FTFx_AX_16K_0K_0K_1K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_DX_(64_48_32_16)K_0K_0K_1K_0K.h"
+#elif (FTFx_KX_512K_128K_4K_4K_4K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_512K_128K_4K_4K_4K.h"
+#elif ((FTFx_KX_256K_64K_4K_2K_2K == FLASH_DERIVATIVE) || (FTFx_KX_128K_64K_4K_2K_2K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(256_128)K_64K_4K_2K_2K.h"
+#elif ((FTFx_KX_512K_0K_0K_2K_0K == FLASH_DERIVATIVE) || (FTFx_KX_256K_0K_0K_2K_0K == FLASH_DERIVATIVE)\
+ || (FTFx_KX_128K_0K_0K_2K_0K == FLASH_DERIVATIVE) || (FTFx_KX_64K_0K_0K_2K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(512_256_128_64)K_0K_0K_2K_0K.h"
+#elif ((FTFx_KX_256K_0K_0K_4K_0K == FLASH_DERIVATIVE) || (FTFx_KX_128K_0K_0K_4K_0K == FLASH_DERIVATIVE) || (FTFx_KX_64K_0K_0K_4K_0K == FLASH_DERIVATIVE))
+ #include "FTFx_KX_(256_128_64)K_0K_0K_4K_0K.h"
+#elif (FTFx_KX_1024K_256K_4K_4K_4K == FLASH_DERIVATIVE)
+ #include "FTFx_KX_1024K_256K_4K_4K_4K.h"
+#endif
+
+/* determine offset value for copy FlashLaunchCommand */
+#if ((CPU_CORE == COLDFIRE)||(CPU_CORE == DSC_56800EX))
+#define LAUNCH_COMMAND_OFFSET 0x0U /* coldfile core dont need to shift address */
+#else
+#define LAUNCH_COMMAND_OFFSET 0x01U /* other cores need to shift address by 1 before copying */
+#endif
+
+/* This macros is used for copy command sequence feature*/
+#if (CPU_CORE == DSC_56800EX)
+ #define PGM2DATA(x) ((x>PROGRAM_RAM_SPACE_BASE)?(x-PROGRAM_RAM_SPACE_BASE + DATA_SPACE_BASE):(x + DATA_SPACE_BASE))
+ #define DATA2PGM(x) (x+PROGRAM_RAM_SPACE_BASE)
+#else
+ #define PGM2DATA(x) (x)
+ #define DATA2PGM(x) (x)
+#endif
+
+/* Enter debug mode macro */
+#if (CPU_CORE == ARM_CORTEX_M)
+ /* CW10, IAR */
+ #if ((defined __ICCARM__) || (defined __GNUC__))
+ #define ENTER_DEBUG_MODE asm ("BKPT #0" )
+ /* KIEL */
+ #elif (defined __ARMCC_VERSION)
+ #define ENTER_DEBUG_MODE __asm ("BKPT #0" )
+ #endif
+#endif
+#if (CPU_CORE == DSC_56800EX)
+ #define ENTER_DEBUG_MODE asm ( debughlt)
+#endif
+#if (CPU_CORE == COLDFIRE)
+ #define ENTER_DEBUG_MODE asm ( HALT )
+#endif
+
+#if ((defined __GNUC__) && (CPU_CORE == ARM_CORTEX_M))
+ #define SIZE_OPTIMIZATION __attribute__((optimize("O4")))
+#else
+ #define SIZE_OPTIMIZATION
+#endif
+
+#endif /* _SSD_FTFx_H_ */
+
+
diff --git a/plan_manage_main/src/include/drivers/FTFx/SSD_Types.h b/plan_manage_main/src/include/drivers/FTFx/SSD_Types.h
new file mode 100644
index 0000000..0b9fa9e
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/SSD_Types.h
@@ -0,0 +1,276 @@
+/****************************************************************************
+ (c) Copyright 2010-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*****************************************************************************
+* *
+* Standard Software Flash Driver For FTFx *
+* *
+* FILE NAME : SSD_FTFx.h *
+* DATE : Oct 10, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*****************************************************************************/
+
+/************************** CHANGES *****************************************
+0.0.1 06.09.2010 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Finalize to 1.0.0
+1.0.2 08.04.2014 FPT Team Update to follow SDK
+ convention(MISRA-C)
+1.0.3 10.10.2014 FPT Team Add to support Doxygen
+****************************************************************************/
+
+#ifndef _SSD_TYPES_H_
+#define _SSD_TYPES_H_
+
+#ifndef FALSE
+#define FALSE 0x0U
+#endif
+
+#ifndef TRUE
+#define TRUE 0x01U
+#endif
+
+#include
+typedef unsigned char bool;
+
+typedef volatile signed char vint8_t;
+typedef volatile unsigned char vuint8_t;
+typedef volatile signed short vint16_t;
+typedef volatile unsigned short vuint16_t;
+typedef volatile signed long vint32_t;
+typedef volatile unsigned long vuint32_t;
+
+#if (defined __MWERKS__)
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+typedef signed short int16_t;
+typedef unsigned short uint16_t;
+typedef signed long int32_t;
+typedef unsigned long uint32_t;
+#endif
+/*!
+ * @addtogroup c90tfs_flash_driver
+ * @{
+ */
+
+
+/*!
+ * @name Type definition for flash driver
+ * @{
+ */
+/*-------------------- Callback function prototype ---------------------*/
+/*! @brief Call back function pointer data type */
+typedef void (* PCALLBACK)(void);
+/*! @brief Swap call back function pointer data type */
+typedef bool (* PFLASH_SWAP_CALLBACK)(uint8_t function);
+
+
+/*---------------- Flash SSD Configuration Structure -------------------*/
+/*! @brief Flash SSD Configuration Structure
+*
+* The structure includes the static parameters for C90TFS/FTFx which are
+* device-dependent. The user should correctly initialize the fields including
+* ftfxRegBase, PFlashBlockBase, PFlashBlockSize, DFlashBlockBase, EERAMBlockBase,
+* DebugEnable and CallBack before passing the structure to SSD functions.
+* The rest of parameters such as DFlashBlockSize, and EEEBlockSize will be
+* initialized in FlashInit() automatically. The pointer to CallBack has to be
+* initialized either for null callback or a valid call back function.
+*
+*/
+typedef struct _ssd_config
+{
+ uint32_t ftfxRegBase; /*!< The register base address of C90TFS/FTFx */
+ uint32_t PFlashBlockBase; /*!< The base address of P-Flash memory */
+ uint32_t PFlashBlockSize; /*!< The size in byte of P-Flash memory */
+ uint32_t DFlashBlockBase; /*!< For FlexNVM device, this is the base address of D-Flash memory (FlexNVM memory); For non-FlexNVM device, this field is unused */
+ uint32_t DFlashBlockSize; /*!< For FlexNVM device, this is the size in byte of area
+ which is used as D-Flash from FlexNVM
+ memory; For non-FlexNVM device, this field is unused */
+ uint32_t EERAMBlockBase; /*!< The base address of FlexRAM (for FlexNVM
+ device) or acceleration RAM memory (for non-FlexNVM device) */
+ uint32_t EEEBlockSize; /*!< For FlexNVM device, this is the size in byte of
+ EEPROM area which was partitioned from
+ FlexRAM; For non-FlexNVM device, this field is unused */
+ bool DebugEnable; /*!< Background debug mode enable */
+ PCALLBACK CallBack; /*!< Call back function to service the time critical events */
+} FLASH_SSD_CONFIG, *PFLASH_SSD_CONFIG;
+
+/* -------------------- Function Pointer ------------------------------- */
+/*! @brief FlashCommandSequence function poiter */
+typedef uint32_t (*pFLASHCOMMANDSEQUENCE) (PFLASH_SSD_CONFIG pSSDConfig);
+
+/*! @brief FlashInit function poiter */
+typedef uint32_t (*pFLASHINIT) (PFLASH_SSD_CONFIG pSSDConfig);
+
+/*! @brief PFlashGetProtection function poiter */
+typedef uint32_t (*pPFLASHGETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t* protectStatus);
+
+/*! @brief PFlashSetProtection function poiter */
+typedef uint32_t (*pPFLASHSETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t protectStatus);
+
+/*! @brief FlashGetSecurityState function poiter */
+typedef uint32_t (*pFLASHGETSECURITYSTATE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* securityState);
+
+/*! @brief FlashSecurityByPass function poiter */
+typedef uint32_t (*pFLASHSECURITYBYPASS) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* keyBuffer, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashEraseAllBlock function poiter */
+typedef uint32_t (*pFLASHERASEALLBLOCK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashEraseBlock function poiter */
+typedef uint32_t (*pFLASHERASEBLOCK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashEraseSector function poiter */
+typedef uint32_t (*pFLASHERASESECTOR) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*! @brief FlashEraseSuspend function poiter */
+typedef uint32_t (*pFLASHERASESUSPEND) (PFLASH_SSD_CONFIG pSSDConfig);
+
+/*! @brief FlashEraseResume function poiter */
+typedef uint32_t (*pFLASHERASERESUME) (PFLASH_SSD_CONFIG pSSDConfig);
+
+/*! @brief FlashProgramSection function poiter */
+typedef uint32_t (*pFLASHPROGRAMSECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashChecksum function poiter */
+typedef uint32_t (*pFLASHCHECKSUM) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint32_t* pSum);
+
+/*! @brief FlashVerifyAllBlock function poiter */
+typedef uint32_t (*pFLASHVERIFYALLBLOCK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! Flash verify block */
+typedef uint32_t (*pFLASHVERIFYBLOCK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashVerifySection function poiter */
+typedef uint32_t (*pFLASHVERIFYSECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint16_t number, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashReadOnce function poiter */
+typedef uint32_t (*pFLASHREADONCE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashProgramOnce function poiter */
+typedef uint32_t (*pFLASHPROGRAMONCE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* pDataArray, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*! @brief FlashProgramCheck function poiter */
+typedef uint32_t (*pFLASHPROGRAMCHECK) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pExpectedData, \
+ uint32_t* pFailAddr, \
+ uint8_t marginLevel, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashReadResource function poiter */
+typedef uint32_t (*pFLASHREADRESOURCE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint8_t* pDataArray, \
+ uint8_t resourceSelectCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief FlashProgram function poiter */
+typedef uint32_t (*pFLASHPROGRAM) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief PFlashSwapCtrl function poiter */
+typedef uint32_t (*pPFLASHSWAPCTRL) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t addr, \
+ uint8_t swapcmd, \
+ uint8_t* pCurrentSwapMode,\
+ uint8_t* pCurrentSwapBlockStatus, \
+ uint8_t* pNextSwapBlockStatus, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief PFlashSwap function poiter */
+typedef uint32_t (*pFLASHSWAP)(PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t flashAddress, \
+ PFLASH_SWAP_CALLBACK pSwapCallback, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+
+/*! @brief DFlashGetProtection function poiter */
+typedef uint32_t (*pDFLASHGETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* protectStatus);
+/*! @brief DFlashSetProtection function poiter */
+typedef uint32_t (*pDFLASHSETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t protectStatus);
+
+/*! @brief EERAMGetProtection function poiter */
+typedef uint32_t (*pEERAMGETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t* protectStatus);
+
+/*! @brief EERAMSetProtection function poiter */
+typedef uint32_t (*pEERAMSETPROTECTION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t protectStatus);
+/*! @brief DEFlashParition function poiter */
+typedef uint32_t (*pDEFLASHPARTITION) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEDataSizeCode, \
+ uint8_t DEPartitionCode, \
+ pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*! @brief SetEEEEnable function poiter */
+typedef uint32_t (*pSETEEEENABLE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint8_t EEEEnable,pFLASHCOMMANDSEQUENCE pFlashCommandSequence);
+/*! @brief EEEWrite function poiter */
+typedef uint32_t (*pEEEWRITE) (PFLASH_SSD_CONFIG pSSDConfig, \
+ uint32_t dest, \
+ uint32_t size, \
+ uint8_t* pData);
+
+/*@}*/
+
+/*! @}*/
+#endif /* _SSD_TYPES_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/demo_cfg.h b/plan_manage_main/src/include/drivers/FTFx/demo_cfg.h
new file mode 100644
index 0000000..2babab5
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/demo_cfg.h
@@ -0,0 +1,84 @@
+/****************************************************************************
+ Copyright (c) 2013-2014 Freescale Semiconductor, Inc.
+ ALL RIGHTS RESERVED.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of the nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY DIRECT,
+ INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************
+
+*************************************************************************
+* *
+* Standard Software Flash Driver For FTFL *
+* *
+* FILE NAME : demo_cfg.h *
+* DATE : April 08, 2014 *
+* *
+* AUTHOR : FPT Team *
+* E-mail : r56611@freescale.com *
+* *
+*************************************************************************/
+
+/************************** CHANGES *************************************
+0.1.0 04.23.2013 FPT Team Initial Version
+1.0.0 12.25.2013 FPT Team Finalize to version 1.0.0
+1.0.2 08.04.2014 FPT Team Update to follow SDK convention(MISRA-C)
+*************************************************************************/
+
+#ifndef _DEMO_H_
+#define _DEMO_H_
+
+#include "common.h"
+
+#define BUFFER_SIZE_BYTE 0x100U
+
+#define EE_ENABLE 0x00U
+#define RAM_ENABLE 0xFFU
+#define DEBUGENABLE 0x00U
+
+#define PSECTOR_SIZE 0x00000400U /* 1 KB size */
+#define DSECTOR_SIZE 0x00000000U
+
+/* FTFL module base */
+#define FTFx_REG_BASE 0x40020000U
+#define PFLASH_BLOCK_BASE 0x00000000U
+#define DEFLASH_BLOCK_BASE 0xFFFFFFFFU
+#define EERAM_BLOCK_BASE 0xFFFFFFFFU
+
+#define PBLOCK_SIZE 0x00020000U /* 128KB size */
+#define EERAM_BLOCK_SIZE 0x00000000U
+
+#define PBLOCK_NUM 1 /* number of individual Pflash block */
+
+/* destination to program security key back to flash location */
+#define SECURITY_LOCATION 0x40CU
+#define BACKDOOR_KEY_LOCATION 0x400U
+
+#define PFLASH_IFR 0xC0U /*Program flash IFR map*/
+
+#define CC_RDCOL_ISR_NUM 21
+
+//#define CACHE_DISABLE
+#define CACHE_DISABLE MCM_PLACR |= MCM_PLACR_DFCDA_MASK;
+
+void ErrorTrap(uint32_t returnCode);
+
+#endif /* _DEMO_H_ */
diff --git a/plan_manage_main/src/include/drivers/FTFx/user_cfg.h b/plan_manage_main/src/include/drivers/FTFx/user_cfg.h
new file mode 100644
index 0000000..e5787d1
--- /dev/null
+++ b/plan_manage_main/src/include/drivers/FTFx/user_cfg.h
@@ -0,0 +1,12 @@
+/******************************************************************************
+* File: uer_cfg.h
+* Purpose: Define derivative selected
+******************************************************************************/
+
+#ifndef _USER_CFG_H
+#define _USER_CFG_H
+
+/* Derivative selection */
+#define FLASH_DERIVATIVE FTFx_LX_128K_0K_0K_1K_0K
+
+#endif /* End of _USER_CFG_H */
diff --git a/settings/plan_manage.wsdt b/settings/plan_manage.wsdt
index 443b3ab..57b95f3 100644
--- a/settings/plan_manage.wsdt
+++ b/settings/plan_manage.wsdt
@@ -12,22 +12,22 @@
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+ 300BuildFind-All-ReferencesFind-in-Files201244300BuildDebug-LogFind-in-Files44062754300BuildFind-in-FilesDebug-LogFind-All-References44062754
@@ -39,40 +39,24 @@
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+ plan_manage_mainplan_manage_main/srcplan_manage_main/src/appplan_manage_main/src/app/includeplan_manage_main/src/cpuplan_manage_main/src/includeplan_manage_main/src/include/platformsplan_manage_main/src/other
- 0
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- TabID-229-19806Debug LogDebug-LogTabID-17440-26563ReferencesFind-All-References
-
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+ 0TabID-30694-24148BuildBuildTabID-18378-24174Debug LogDebug-LogTabID-31998-6412Find in FilesFind-in-FilesTabID-20624-12561ReferencesFind-All-References0
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- iaridepm.enu1-2-2670299-2-21589512343896741235156684318-2-22671282-2-21284269100312527393112343896741
+ iaridepm.enu1-2-2513280-2-2200199153492274105216424709366-2-21681305-2-213071701003070234160153492275482
diff --git a/settings/plan_manage.wspos b/settings/plan_manage.wspos
index 064cc36..d274c93 100644
--- a/settings/plan_manage.wspos
+++ b/settings/plan_manage.wspos
@@ -1,2 +1,2 @@
[MainWindow]
-WindowPlacement=_ 1610 204 2635 730 3
+WindowPlacement=_ 129 165 1154 691 3